BCM5325EKQMG: Broadcom ROBOswitch Specs & Legacy Guide

The 10/100 Switch That Powered a Decade of Home Routers and Still Shows Up on Repair Benches in 2025

The Broadcom BCM5325E was introduced around 2004 as a "fourth generation switch on a chip" — Broadcom's ROBOswitch line targeted at SOHO routers, residential gateways, and cost-optimized embedded networking equipment. The same year, Linksys was shipping the WRT54G. Netgear, D-Link, and Asus were building 802.11g routers with identical switching requirements: five 10/100 ports, one uplink to a MIPS or ARM SoC, 802.1Q VLAN for WAN/LAN separation, enough management capability to support OpenWrt and DD-WRT.

BCM5325E became the default. It appeared in so many production routers — Linksys WRT54G, WRT54GL, WRT54GS, D-Link DIR-600, numerous Netgear models, ASUS RT-N10 variants — that it is more accurate to describe the home router market of 2005–2015 as "BCM5325E plus various SoCs" than to enumerate the individual products.

Twenty years later, the chip is still available. Veswin lists over 23,000 units in stock. Repair technicians source it for board-level repair of still-functional routers in commercial and industrial service. Embedded gateway designers in cost-constrained applications specify it because it is characterized, inexpensive, and has a mature Linux driver (b53) that is mainline in the kernel since 4.x. And occasionally, an engineer encounters a BCM5325EKQMG on a BOM for the first time and needs to understand what the "E" means and whether the design should be migrated to something more current.

This guide covers all three audiences.

1.0 What the BCM5325EKQMG Is — and What "ROBOswitch" Meant

Full part number decode:

Field	Value	Meaning
BCM	BCM	Broadcom Communications
5325	5325	ROBOswitch product identifier, 5-port 10/100 family
E	E	Enhanced variant — adds SPI management interface; pin-compatible upgrade over BCM5325M
K	K	Commercial temperature grade (0°C to +70°C junction)
Q	Q	MQFP (Metric Quad Flat Package)
M	M	128-pin count
G	G	RoHS compliant, lead-free

BCM5325 family variants:

Variant	Management interface	Uplink	Notes
BCM5325	MII-only	MII	Original, basic
BCM5325M	MII + MDIO	MII + 7-wire	Mid-tier
BCM5325E	MII + MDIO + SPI	MII or Reverse MII	Most capable; this part
BCM5325U	MII + MDIO + SPI	MII or Reverse MII	BCM5325E variant for different SoC pin-out
BCM5325F	MII + MDIO	MII	Different feature set

The BCM5325E (EKQMG) and BCM5325U share the same functional feature set. BCM5325E is pin-compatible with BCM5325M; BCM5325U is pin-compatible with BCM5325 (original). This compatibility enabled router manufacturers to design one PCB that could accept either variant depending on supply availability.

"ROBOswitch" branding:

Broadcom's ROBOswitch line was positioned for SOHO (Small Office/Home Office) applications with emphasis on:

• Low power (< 1.0W total — critical for routers without active cooling)
• Single-chip integration (five PHYs + six MACs + switch fabric + management in 128 pins)
• Simple host interface (MII to a BCM63xx DSL modem SoC, or MIPS/ARM application processor)
• Built-in management for WAN/LAN separation without external management processor

The "ROBO" prefix referred to Broadcom's Register-based Operations and Bridging Operations management model — a register-access scheme for switch configuration accessible via MDC/MDIO or SPI, distinct from the full SNMP-based management of enterprise switches.

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2.0 Specifications

From the Broadcom BCM5325E datasheet (© 2004 Broadcom Corporation):

Switching:

• Total ports: 6 (5 user ports with integrated PHY + 1 uplink/CPU port)
• PHY standard: IEEE 802.3u 10BASE-T / 100BASE-TX per port (auto-negotiation, auto-MDI/MDI-X)
• MACs: 6 × 802.3x-compliant MACs
• Switch fabric: Non-blocking, wire-speed 10/100 switching
• Packet buffer: 1 Mbit (128 KB)
• Control memory: 512 Kbit (64 KB)

MAC address table:

• Entries: 1,024 (1K) addresses
• Automatic learning and aging
• Supports static entries

Management features:

• 802.1Q VLAN: 16 VLAN entries (port-based and tagged)
• 802.1p QoS: 4 priority queues per port
• 802.1d Spanning Tree Protocol (STP)
• 802.1x EAPOL higher-layer protocol support
• IGMP snooping (Layer 3)
• Storm control: Programmable broadcast/multicast suppression
• Port mirroring
• WAN port and protected port support (traffic isolation for WAN/LAN separation)
• Per-port flow control: 802.3x full-duplex and half-duplex back-pressure

Host uplink (port 6):

• MII (standard, 25 MHz clock, 4-bit data)
• Reverse MII (RMII-compatible): Allows connection to SoCs that present an MII MAC with reversed signal directions
• 7-wire interface: Simplified reduced-pin interface for some SoC integrations

Management access:

• MDC/MDIO: IEEE 802.3 Clause 22 PHY management
• SPI: 3-wire Serial Peripheral Interface for switch register access (the "E" feature)
• Internal oscillator: No external crystal required — simplifies PCB design

Power:

• VDD: 3.3V (I/O) and 2.5V (core) — or single 3.3V with internal regulation in some configurations
• Typical power: < 1.0W (all 5 ports active at 100 Mbps)

Package:

• 128-pin MQFP (PQFP), 28mm × 28mm body with 0.5mm lead pitch

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3.0 Operating Modes: MII vs Reverse MII, SPI vs MDIO Management

Uplink port (port 6) configuration:

The BCM5325E's port 6 connects to the host SoC and is configurable as MII or Reverse MII via strap pins. This distinction matters because different SoCs present their Ethernet MAC in different electrical directions:

In standard MII: the SoC MAC drives the transmit clock (TX_CLK) and receives it. The BCM5325E provides the receive clock (RX_CLK). Signal directions are from the SoC's perspective.

In Reverse MII: the BCM5325E drives the clock. Used when the SoC's Ethernet MAC expects the PHY to provide the reference clock (common in older MIPS SoCs where the "reverse MII" interface was an internal MAC that expected an external PHY clock). The BCM5325E can present itself as a PHY to such a MAC.

The strap pin configuration (set by pull-up/pull-down resistors at power-up) selects the mode. Incorrect strap configuration results in no MII link between the BCM5325E and the host — the SoC will show the Ethernet interface as down or unable to negotiate.

Management interface selection — SPI vs MDC/MDIO:

Both SPI and MDC/MDIO access the same register file in the BCM5325E. The choice depends on what the host SoC provides:

• SPI: Available on most MCUs and application processors. The SPI management interface gives full access to all BCM5325E switch registers at SPI bus speeds, making it faster for bulk register configuration at startup.
• MDC/MDIO: Standard IEEE 802.3 management interface, widely supported by Linux kernel Ethernet drivers. The switch registers are accessed via a pseudo-PHY at MDIO address 0x10.

The Linux b53 driver uses MDC/MDIO (via the switch's pseudo-PHY register access) or SPI (via a dedicated SPI driver path) depending on how the device tree configures the management interface.

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4.0 External Circuit Requirements

Crystal / oscillator:

The BCM5325E includes an internal oscillator that uses an external crystal as its reference. A 25 MHz crystal connected to the XTALIN/XTALOUT pins is required. Alternatively, a 25 MHz oscillator can drive XTALIN with XTALOUT left unconnected. Crystal specification: 25 MHz, ±50 ppm, load capacitance per BCM5325E reference schematic (typically 18–22 pF). The internal oscillator eliminates the need for a separate clock IC — a cost and BOM simplification.

Magnetics for user ports (ports 1–5):

Each of the five 10/100BASE-T ports requires a standard 10/100BASE-TX isolation transformer. Bob Smith termination is recommended. Place magnetics within 15 mm of the BCM5325E MDI pins. 10/100-only magnetics (not gigabit) are required and are less expensive than GbE transformers.

Power supply:

The BCM5325E requires 3.3V for I/O and an internal regulator generates the 2.5V core. External 2.5V can also be supplied separately depending on the variant and configuration. Decouple 3.3V supply with 10 µF + 100 nF ceramics per supply pin cluster.

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5.0 ⚠️ Four Pitfalls in BCM5325E Designs

Pitfall 1: MII/Reverse MII strap mismatch causing no uplink link

The MII interface direction (standard vs reverse) must match what the host SoC expects. A SoC MAC that expects standard MII will not link up if the BCM5325E is strapped for Reverse MII. The symptom is the host SoC showing its Ethernet interface as permanently down, with no link LED on port 6. Diagnosis: read the BCM5325E's port 6 status register via MDIO or SPI to confirm whether the switch side sees a link. If the switch sees no link on its internal port 6 despite the cable being connected (the uplink to the SoC), the strap configuration is likely the cause.

Pitfall 2: Incorrect VLAN configuration allowing WAN traffic to bridge directly to LAN ports

The BCM5325E supports WAN port and protected port modes specifically for preventing WAN-to-LAN direct switching. If VLAN configuration is not explicitly programmed at startup, the default post-reset state may allow traffic from port 6 (the WAN uplink, if the design uses one of the PHY ports as WAN and port 6 as CPU) to be forwarded directly to LAN ports — bypassing any firewall processing in the SoC. This is the same pitfall as described for QCA8337: the switch default forwards traffic freely until explicit VLAN isolation is programmed by the driver. The b53 Linux driver handles this correctly for DSA configurations, but designs using the switch in unmanaged or partially managed modes must explicitly configure port isolation.

Pitfall 3: Using only MDC/MDIO without enabling the enhanced register access

The BCM5325E's VLAN, QoS, and advanced management features are in switch global registers that require the extended indirect MDIO access sequence (write to management address register, then read/write data register) — similar to QCA8337. Standard IEEE 802.3 PHY register reads (which some simpler Linux Ethernet drivers perform) only access the individual PHY registers at addresses 0–4, not the switch management registers. A driver that does only standard PHY MDIO reads will see the five PHY link states but will be unable to configure VLANs or any switch fabric feature. Verify that the management software uses the extended register access protocol for switch configuration.

Pitfall 4: Sourcing from secondary market without verifying the BCM5325E vs BCM5325 distinction

The BCM5325 (without E) and BCM5325E are pin-compatible, but the BCM5325 lacks the SPI management interface and has fewer management capabilities. Counterfeit BCM5325EKQMG chips that are actually BCM5325 or BCM5325M devices will pass basic link testing but fail when the SPI management interface is accessed. If the design relies on SPI for switch register access, verify via register read that the chip responds correctly to SPI transactions at startup.

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6.0 Modern Substitutes and When to Upgrade

If the application is new development rather than legacy maintenance, BCM5325E is not the preferred choice for new designs. The 10/100 speed ceiling, 1K MAC table, and 16-entry VLAN table are limiting for many current applications.

Direct functional substitutes in new designs:

Device	Speed	Ports	Integrated PHY	Linux driver	Notes
Microchip KSZ8895	10/100	5+1	Yes	ksz8795 (mainline)	Near drop-in functional equivalent
Microchip KSZ9897	GbE	5+2	Yes	ksz9477 (mainline)	Upgrade: GbE speeds, larger tables
QCA8337-AL3C	GbE	5+2	Yes	qca8k (mainline)	Upgrade: GbE, 2K MAC, 802.1Q full
Marvell 88E6061	GbE	5+2	Yes	mv88e6xxx (mainline)	Upgrade: GbE, enterprise features
Realtek RTL8367	GbE	5+2	Yes	Out-of-tree	Upgrade: widely used in newer SOHO

When to keep BCM5325E:

• Board-level repair of equipment in service: the BCM5325E is available, the board is proven, and replacement is the most cost-effective maintenance action
• Legacy embedded product with a long remaining service life where the 10/100 speed is adequate for the application (industrial sensors, legacy PLC Ethernet, low-bandwidth IoT)
• Cost-constrained designs where 10/100 is sufficient and BCM5325E's < 1W power budget is a genuine advantage

When to migrate to a modern device:

• Any new design where gigabit speeds, larger MAC/VLAN tables, or a commercially supported and actively maintained silicon supply chain are needed
• Designs targeting OpenWrt 23.x and later: the b53 driver remains mainline but receives less active development attention than qca8k or ksz9477

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7.0 PCB Notes and Driver Integration

PCB layout (128-pin MQFP):

The 128-pin MQFP (28mm × 28mm, 0.5mm pitch) is a QFP (Quad Flat Package) with leads on all four sides — accessible and solderable without BGA equipment. The package can be hand-soldered by experienced technicians or assembled via standard SMT reflow. No underfill or special via structures are required, unlike BGA packages.

Route the MII interface (port 6 to SoC) as matched-length pairs with controlled impedance (50 Ω single-ended). Keep MDI pairs (ports 1–5) matched in length to within ±10 mm per pair.

Linux b53 driver configuration:

The Broadcom b53 driver is the mainline Linux DSA driver for BCM5325 and related switch ICs. Sample device tree for a BCM5325E connected via SPI:

spi@10000b00 {
    switch@0 {
        compatible = "brcm,bcm5325";
        reg = <0>;
        spi-max-frequency = <781000>;

        ports {
            port@0 { reg = <0>; label = "lan1"; };
            port@1 { reg = <1>; label = "lan2"; };
            port@2 { reg = <2>; label = "lan3"; };
            port@3 { reg = <3>; label = "lan4"; };
            port@4 { reg = <4>; label = "wan"; };
            port@8 {
                reg = <8>;
                label = "cpu";
                ethernet = <&ethernet0>;
                phy-mode = "mii";
                fixed-link { speed = 100; full-duplex; };
            };
        };
    };
};

Note: the BCM5325's CPU port appears at register address 8 (not 5 or 6) in the b53 driver model.

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8.0 Sourcing BCM5325EKQMG in 2025

The BCM5325EKQMG is technically an active Broadcom part but is no longer promoted for new designs. Broadcom's focus shifted to GbE switches years ago. Availability comes primarily from two sources:

Secondary market: Large quantities exist (23,000+ units at one broker). These originate from excess production inventory, end-of-life equipment disassembly, and original factory overruns stored for the repair market. Secondary market pricing is typically $1–3 per unit in quantity.

Authorized distribution: Arrow and Avnet may carry small quantities. Lead times for factory-direct stock are long or unavailable. The secondary market is the practical sourcing channel for BCM5325EKQMG.

Counterfeit risk: Given the volume of secondary market stock and the widespread use of BCM5325 family variants, counterfeit risk is moderate. Verification: use SPI to read the BCM5325E's Device ID register (register 0x30 via the ROBO management access). The BCM5325E returns a specific device ID code. If the chip does not respond to SPI management, or returns an incorrect device ID, it may be a BCM5325 (non-E) variant or counterfeit.

For verified authentic BCM5325EKQMG inventory with competitive pricing, visit aichiplink.com.

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9.0 Real Questions from Engineers and Repair Technicians

Q: I have a failed BCM5325EKQMG in a Linksys WRT54GL. Is BCM5325UKQMG a drop-in replacement?

A: BCM5325U is pin-compatible with BCM5325 (the original, not the E variant). BCM5325E is pin-compatible with BCM5325M. The E and U variants are NOT pin-compatible with each other — they serve different host SoC pin-out requirements. For a WRT54GL board designed for BCM5325E, you need another BCM5325EKQMG or a BCM5325MKQMG (the E's pin-compatible predecessor). A BCM5325UKQMG would have a different pin-out and cannot be installed in the same footprint. Additionally, the WRT54GL's firmware (Linksys OEM or OpenWrt) is configured for BCM5325E's management interface and register map — a different functional variant may not be recognized correctly.

Q: The OpenWrt b53 driver shows the BCM5325E switch ports as individual interfaces, but LAN clients can still ping each other directly without going through the router CPU. Is this a driver bug?

A: This is the default VLAN behavior, not a driver bug. Without explicit VLAN configuration, the BCM5325E's hardware default allows traffic between all ports. The b53 driver requires a proper DSA device tree configuration with VLAN definitions to isolate ports. In OpenWrt, the switch configuration (in /etc/config/network using the swconfig interface or the newer DSA model) must explicitly configure the VLAN table to place LAN ports and the CPU port in a LAN VLAN and the WAN port in a separate WAN VLAN. Without this configuration, the switch operates as a flat unmanaged switch. Review OpenWrt's wiki for BCM5325 switch configuration to find the correct VLAN setup for your specific target platform.

Q: We are designing a new industrial sensor hub that needs 4 × 10/100 LAN ports. Should we use BCM5325EKQMG or upgrade to a GbE switch?

A: For an industrial sensor hub where sensor data rates are typically 1–10 Mbps per sensor, 10/100 Ethernet is fully adequate. BCM5325E's < 1W power budget is genuinely advantageous for battery-adjacent or thermally constrained designs. However, for a new design, the Microchip KSZ8895 is a better choice than BCM5325EKQMG: same 5+1 port 10/100 architecture, same < 1W power budget, similar feature set, LQFP package, mainline Linux driver, active Microchip production support, and better long-term supply chain reliability than a 20-year-old Broadcom part primarily available from secondary market. If 10/100 is genuinely sufficient, use KSZ8895 for new designs; use BCM5325EKQMG only for replacement of existing deployed equipment.

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10.0 Quick Reference Card

Part Number Decode:

Field	Value	Meaning
BCM5325	BCM5325	Broadcom ROBOswitch 5+1 port 10/100
E	E	Enhanced: adds SPI management interface
K	K	Commercial: 0°C to +70°C
Q	Q	MQFP (Quad Flat Package)
M	M	128-pin
G	G	RoHS compliant, lead-free

Key Specifications:

Parameter	Value
User ports	5 (10/100BASE-TX, integrated PHY)
CPU/uplink port	1 (MII or Reverse MII)
MAC address table	1,024 entries
VLAN entries	16 (port-based + 802.1Q)
QoS queues	4 per port (802.1p)
Management	MDC/MDIO + SPI (E variant)
Internal oscillator	Yes (external 25 MHz crystal only)
Power	< 1.0W typical
Supply	3.3V + 2.5V (or 3.3V with internal reg)
Package	128-pin MQFP, 28×28mm
Linux driver	b53 (DSA, mainline kernel)

BCM5325 Variant Comparison:

Variant	SPI	Uplink	Pin-compatible with
BCM5325	No	MII	BCM5325U
BCM5325M	No	MII + 7-wire	BCM5325E
BCM5325E (this part)	Yes	MII + Rev MII	BCM5325M
BCM5325U	Yes	MII + Rev MII	BCM5325

When BCM5325EKQMG is the right choice:

• ✅ Replacing a failed BCM5325E in deployed legacy equipment
• ✅ New design with genuine 10/100 requirement and < 1W power budget (but prefer KSZ8895)
• ❌ New designs where long-term supply continuity matters → use KSZ8895
• ❌ Applications needing GbE, > 1K MACs, or > 16 VLANs → use QCA8337 or KSZ9897

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For sourcing Broadcom BCM5325EKQMG with competitive pricing and traceability, visit aichiplink.com.

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Written by Jack Elliott from AIChipLink.

 

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