RTL8211FS-CG: Technical Guide to Realtek Gigabit Ethernet PHY Transceiver

Introduction

The RTL8211FS-CG is a single-port Gigabit Ethernet PHY transceiver manufactured by Realtek Semiconductor, supporting 10/100/1000 Mbps operation over twisted-pair copper cables with integrated MAC interface (RGMII/GMII), auto-negotiation, and IEEE 802.3 compliance for embedded systems, single-board computers, routers, switches, and IoT devices requiring cost-effective, reliable Ethernet connectivity.

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Technical Overview

Core Specifications

Parameter	Specification
Data Rates	10/100/1000 Mbps
Standards	IEEE 802.3 (10BASE-T), 802.3u (100BASE-TX), 802.3ab (1000BASE-T)
MAC Interface	RGMII (Reduced Gigabit MII), GMII
MDI Interface	RJ-45 (twisted-pair copper)
Cable Support	Cat 5e/6 (up to 100m)
Supply Voltage	3.3V (I/O), 1.2V (core)
Package	40-pin QFN (6×6mm)
Operating Temp	0°C to +70°C (commercial), -40°C to +85°C (industrial)

Part Number Decoder

RTL8211FS-CG:

• RTL8211 = Realtek Gigabit PHY family
• F = Single-port variant
• S = Cost-optimized version
• -CG = Package type (QFN-40) and grade

Key Features

Multi-Speed Support:

• 1000BASE-T (1 Gbps) Gigabit Ethernet
• 100BASE-TX (100 Mbps) Fast Ethernet
• 10BASE-T (10 Mbps) Ethernet
• Auto-negotiation (speed, duplex, flow control)

Flexible MAC Interface:

• RGMII: Reduced pin count (12 signals), 125 MHz
• GMII: Full interface (24 signals), 125 MHz
• Clock output: 125/50/25 MHz (for MAC)

Integrated Features:

• IEEE 802.3az Energy Efficient Ethernet (EEE)
• Wake-on-LAN (WoL) support
• MDI/MDIX auto-crossover
• Cable diagnostics (TDR)
• Loop-back modes (internal/external)

Low Power:

• Active: ~300-400 mW @ 1000 Mbps
• Idle: ~100 mW (EEE enabled)
• Power-down: <10 mW

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Complete Specifications

Supported Standards

Standard	Data Rate	Medium	Cable
IEEE 802.3ab	1000 Mbps	Twisted-pair	Cat 5e/6 (100m)
IEEE 802.3u	100 Mbps	Twisted-pair	Cat 5 (100m)
IEEE 802.3	10 Mbps	Twisted-pair	Cat 3 (100m)
IEEE 802.3az	EEE (Energy Efficient Ethernet)	-	-

MAC Interface Specifications

RGMII (Reduced GMII):

• Data width: 4-bit (RXD[3:0], TXD[3:0])
• Clock: 125 MHz @ 1000 Mbps, 25 MHz @ 100 Mbps, 2.5 MHz @ 10 Mbps
• Signals: TX_CLK, TX_CTL, TXD[3:0], RX_CLK, RX_CTL, RXD[3:0]
• Total pins: 12 (vs 24 for GMII)

GMII (Gigabit MII):

• Data width: 8-bit (RXD[7:0], TXD[7:0])
• Clock: 125 MHz @ 1000 Mbps
• Signals: TX_CLK, TX_EN, TX_ER, TXD[7:0], RX_CLK, RX_DV, RX_ER, RXD[7:0]

Electrical Specifications

Parameter	Min	Typ	Max	Unit
VDDA (Analog)	3.135	3.3	3.465	V
VDDIO (I/O)	2.375	2.5/3.3	3.465	V
VDD12 (Core)	1.14	1.2	1.26	V
Power (1000BASE-T)	-	350	450	mW
Power (100BASE-TX)	-	150	200	mW
Power (10BASE-T)	-	80	120	mW

Performance Specifications

Parameter	Specification
Latency (PHY)	<1 µs (typical)
Jitter (TX)	<1.4 ns (1000BASE-T)
Return Loss	>10 dB @ 1-100 MHz
Cable Length	100m max (Cat 5e/6)

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Applications

Embedded Systems

Single-Board Computers (SBC):

• Raspberry Pi alternatives (custom SBCs)
• BeagleBone-style boards
• Industrial SBCs (x86, ARM)
• Edge computing platforms

Typical Configuration:

SoC/CPU (ARM Cortex-A, x86)
    ↓ RGMII (12 signals)
RTL8211FS-CG PHY
    ↓ MDI (twisted-pair)
RJ-45 Connector → Ethernet Network

Routers & Switches

Home/SOHO Routers:

• WAN port (Gigabit uplink)
• LAN ports (multiple RTL8211FS)
• Mesh WiFi routers
• VPN gateways

Managed Switches:

• 4-8 port Gigabit switches
• PoE switches (with external PoE controller)
• Industrial Ethernet switches

IoT & Industrial

Industrial Automation:

• PLC (Programmable Logic Controllers)
• HMI (Human-Machine Interfaces)
• Ethernet I/O modules
• Industrial cameras

IoT Gateways:

• Smart building controllers
• Energy monitoring systems
• Security systems (NVR/DVR)
• Edge AI devices

Network Attached Storage (NAS)

NAS Systems:

• Entry-level NAS (2-4 bay)
• Home media servers
• Backup appliances
• File servers

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Design Implementation

Hardware Circuit

Typical Reference Design:

        SoC/Processor
            ↓ RGMII (3.3V)
        RTL8211FS-CG
            ↓ MDI (differential)
        Magnetics Module
            ↓
        RJ-45 Connector (with LEDs)

Power Supply:

5V Input
   ↓ LDO (3.3V, 300mA)
3.3V → VDDA, VDDIO
   ↓ LDO (1.2V, 150mA)
1.2V → VDD12 (core)

Pin Configuration

Essential Connections:

• RGMII Signals (12 pins): TX_CLK, TX_CTL, TXD[3:0], RX_CLK, RX_CTL, RXD[3:0]
• MDI (4 pairs): TXP/TXN (2 pairs), RXP/RXN (2 pairs)
• Management: MDC (clock), MDIO (data) for PHY configuration
• Control: RESET_N (active-low reset), CLK_OUT (optional)
• Power: VDDA, VDDIO, VDD12, multiple GND

Magnetics & RJ-45:

• Isolation transformer: 1:1 turns ratio, 350µH minimum
• Common-mode chokes: Filter noise on TX/RX pairs
• RJ-45 with integrated magnetics (e.g., HanRun HR911105A)

PCB Layout Guidelines

Critical Design Rules:

• RGMII traces: 50Ω single-ended impedance, <6 inch length, matched timing
• MDI traces: 100Ω differential impedance (±10%), symmetrical routing
• Ground plane: Solid ground plane beneath PHY, stitching vias every 200 mils
• Power decoupling: 0.1µF + 1µF ceramic caps close to VDD pins
• Crystal (optional): 25 MHz crystal with 18pF load caps if external clock needed

Layer Stack-Up (4-layer PCB):

Top Layer:    Signal (RGMII, control)
Layer 2:      GND
Layer 3:      Power (3.3V, 1.2V)
Bottom Layer: Signal (MDI, less critical)

Software Configuration

MDIO Register Access:

// Example: Read PHY ID
uint16_t phy_id1 = mdio_read(PHY_ADDR, 0x02); // PHYID1
uint16_t phy_id2 = mdio_read(PHY_ADDR, 0x03); // PHYID2
// RTL8211FS: ID = 0x001CC916

// Enable auto-negotiation
mdio_write(PHY_ADDR, 0x00, 0x1000); // BMCR: Auto-neg enable

// Read link status
uint16_t bmsr = mdio_read(PHY_ADDR, 0x01); // BMSR
bool link_up = (bmsr & 0x0004) ? true : false;

Linux Driver:

• Kernel driver: drivers/net/phy/realtek.c
• Device tree entry (example):

&fec {
    phy-mode = "rgmii";
    phy-handle = <&ethphy0>;
    status = "okay";
    
    mdio {
        ethphy0: ethernet-phy@1 {
            reg = <1>;
            compatible = "ethernet-phy-ieee802.3-c22";
        };
    };
};

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Comparison & Alternatives

vs RTL8211E (Previous Generation)

Feature	RTL8211FS-CG	RTL8211E
Package	QFN-40 (6×6mm)	QFN-48 (7×7mm)
Power (1000BASE-T)	350 mW	450 mW
EEE Support	✅ Yes	✅ Yes
Cost	Lower	Higher
Use Case	Cost-optimized	General purpose

vs Microchip LAN8720A (100 Mbps)

Feature	RTL8211FS-CG	LAN8720A
Max Speed	1000 Mbps	100 Mbps
MAC Interface	RGMII/GMII	RMII
Power	350 mW @ 1G	130 mW @ 100M
Cost	~$2-3	~$1-1.5
Application	Gigabit required	Fast Ethernet sufficient

Conclusion

The RTL8211FS-CG provides cost-effective Gigabit Ethernet PHY functionality with 10/100/1000 Mbps support, RGMII/GMII MAC interface, Energy Efficient Ethernet, and comprehensive features for embedded systems, routers, IoT devices, and industrial applications requiring reliable, standards-compliant Ethernet connectivity in compact 40-pin QFN package.

Key Advantages:

✅ Gigabit Performance: 1000 Mbps over Cat 5e/6
✅ Flexible Interface: RGMII (12 pins) or GMII (24 pins)
✅ Low Power: 350 mW active, EEE support
✅ Auto-Negotiation: Speed, duplex, flow control
✅ Cost-Effective: ~$2-3 for Gigabit PHY
✅ Small Package: QFN-40 (6×6mm) saves PCB space
✅ Linux Support: Mainline kernel driver

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Written by Jack Elliott from AIChipLink.

 

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