

LATTICE LC4064V-25TN100C
Manufacturer No:
LC4064V-25TN100C
Manufacturer:
Package:
TQFP-100
Description:
EE PLD, 2.5ns, 64-Cell, CMOS, PQFP100, TQFP-100
Quantity:
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LC4064V-25TN100C information
LATTICE LC4064V-25TN100C technical specifications, attributes, parameters and parts with similar specifications to LATTICE LC4064V-25TN100C.
- Type
- Parameter
- Pbfree Code
- Yes
- RoHS Status
- RoHS Compliant
- Part Life Cycle Code
- Active
- Ihs Manufacturer
- LATTICE SEMICONDUCTOR CORP
- Part Package Code
- QFP
- Package Description
- TQFP-100
- Pin Count
- 100
- Reach Compliance Code
- compliant
- ECCN Code
- EAR99
- HTS Code
- 8542.39.00.01
- Samacsys Manufacturer
- Lattice Semiconductor
- Architecture
- PAD-TYPE
- Clock Frequency-Max
- 250 MHz
- In-System Programmable
- YES
- JESD-30 Code
- S-PQFP-G100
- JESD-609 Code
- e3
- JTAG BST
- YES
- Length
- 14 mm
- Moisture Sensitivity Level
- 3
- Number of Dedicated Inputs
- 10
- Number of I/O Lines
- 64
- Number of Inputs
- 74
- Number of Macro Cells
- 64
- Number of Outputs
- 64
- Number of Terminals
- 100
- Operating Temperature-Max
- 90 °C
- Organization
- 10 DEDICATED INPUTS, 64 I/O
- Output Function
- MACROCELL
- Package Body Material
- PLASTIC/EPOXY
- Package Code
- LFQFP
- Package Equivalence Code
- QFP100,.63SQ,20
- Package Shape
- SQUARE
- Package Style
- FLATPACK, LOW PROFILE, FINE PITCH
- Peak Reflow Temperature (Cel)
- 260
- Programmable Logic Type
- EE PLD
- Propagation Delay
- 2.5 ns
- Qualification Status
- Not Qualified
- Seated Height-Max
- 1.6 mm
- Supply Voltage-Max
- 3.6 V
- Supply Voltage-Min
- 3 V
- Supply Voltage-Nom
- 3.3 V
- Surface Mount
- YES
- Terminal Finish
- MATTE TIN
- Terminal Form
- GULL WING
- Terminal Pitch
- 0.5 mm
- Terminal Position
- QUAD
- Time@Peak Reflow Temperature-Max (s)
- 40
Download datasheets and manufacturer documentation for LATTICE LC4064V-25TN100C.
Datasheets:
LC4064V-25TN100C Overview
64 macrocells are present in the mobile phone network, which offer radio coverage from a high-power cell tower, antenna, or mast.The item is enclosed in a 100-LQFP package.It is recommended that the chip be packaged by Tray.Ensure its reliability by operating at 0°C~90°C TJ.It is recommended to mount the chip by Surface Mount.FPGAs belonging to the ispMACH® 4000V series contain this type of chip.You can find its related parts in the LC4064.If high efficiency is desired, the supply voltage should be kept at 3.3V.In this case, it is mounted by Surface Mount.The pins are 100.This device operates at a voltage of 3.6V when the maximum supply voltage is applied.With a minimal supply voltage of 3V, it operates.4 logic elements/blocks exist.This frequency is 454.5MHz.It is important to make sure that the maximum frequency is less than 400MHz.It is recommended that the operating temperature be higher than 0°C.It is recommended that the operating temperature be below 90°C.4 logic blocks (LABs) make up this circuit.An elementary building block consists of 36logic elements/cells.
LC4064V-25TN100C Features
100-LQFP package
The operating temperature of 0°C~90°C TJ
100 pins
4 logic blocks (LABs)
LC4064V-25TN100C Applications
There are a lot of Lattice Semiconductor Corporation
LC4064V-25TN100C CPLDs applications.
- Digital systems
- Portable digital devices
- Handheld digital devices
- Battery operated portable devices
- Complex programmable logic devices
- Digital designs
- Field programmable gate
- Address decoding
- D/T registers and latches
- Synchronous or asynchronous mode
User Guide
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