LATTICE ISPLSI 2064VE-135LTN100

Manufacturer No:

ISPLSI 2064VE-135LTN100

Manufacturer:

LATTICE

Package:

100-LQFP

Description:

3.3V 0.5mm PMIC ispLSI® 2000VE Series ISPLSI 2064 3.3V 100-LQFP

Quantity:

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In Stock :Available

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ISPLSI 2064VE-135LTN100 information

LATTICE ISPLSI 2064VE-135LTN100 technical specifications, attributes, parameters and parts with similar specifications to LATTICE ISPLSI 2064VE-135LTN100.

Type
Parameter

Mounting Type
Surface Mount

Package / Case
100-LQFP

Surface Mount
YES

Operating Temperature
0°C~70°C TA

Packaging
Tray

Series
ispLSI® 2000VE

Published
2000

JESD-609 Code
e3

Pbfree Code
yes

Part Status
Obsolete

Moisture Sensitivity Level (MSL)
3 (168 Hours)

Number of Terminations
100

ECCN Code
EAR99

Terminal Finish
Matte Tin (Sn)

Additional Feature
YES

HTS Code
8542.39.00.01

Subcategory
Programmable Logic Devices

Technology
CMOS

Terminal Position
QUAD

Terminal Form
GULL WING

Peak Reflow Temperature (Cel)
260

Supply Voltage
3.3V

Terminal Pitch
0.5mm

Reach Compliance Code
compliant

Base Part Number
ISPLSI 2064

Pin Count
100

JESD-30 Code
S-PQFP-G100

Qualification Status
Not Qualified

Supply Voltage-Max (Vsup)
3.6V

Power Supplies
3.3V

Supply Voltage-Min (Vsup)
3V

Programmable Type
In System Programmable

Number of I/O
64

Clock Frequency
100MHz

Propagation Delay
7.5 ns

Number of Gates
2000

Output Function
MACROCELL

Number of Macro Cells
64

JTAG BST
NO

Voltage Supply - Internal
3V~3.6V

Delay Time tpd(1) Max
7.5ns

Number of Logic Elements/Blocks
16

Length
14mm

Height Seated (Max)
1.6mm

Width
14mm

RoHS Status
RoHS Compliant

Download datasheets and manufacturer documentation for LATTICE ISPLSI 2064VE-135LTN100.

Datasheets:

latticesemiconductorcorporation-isplsi2064ve100lt44-datasheets-2029.pdf

latticesemiconductorcorporation-lptm1012473tg128i-datasheets-5774.pdf

PCN Packaging:

latticesemiconductorcorporation-mod6320tc-pcnpackaging-2141.pdf

ISPLSI 2064VE-135LTN100 Overview

64 macrocells exist, which are cells in a mobile phone network that are primarily composed of high-power towers, antennas, or masts.A 100-LQFP package contains the item.This device has 64 I/O ports programmed into it.It is programmed that device terminations will be 100 .The terminal position of this electrical component is QUAD.A voltage of 3.3V is used as the power supply for this device.It is a part of family Programmable Logic Devices.It is recommended to package the chip by Tray.During operation, the operating temperature is kept at 0°C~70°C TA to ensure its reliability.Mount the chip by Surface Mount.This type of FPGA is a part of the ispLSI® 2000VE series.Chips are programmed with 100 pins.If this device is used, you will also be able to find YES.There are related parts in ISPLSI 2064.In digital circuits, there are 2000 gates, which act as a basic building block.This logic element/block contains 16 logic elements.It runs on 3.3V volts of power.In order to ensure proper operation, a maximum supply voltage (Vsup) of 3.6V is required.It is important that the supply voltage (Vsup) exceeds 3VV.It should not exceed 100MHz in its clock frequency.

ISPLSI 2064VE-135LTN100 Features

100-LQFP package
64 I/Os
The operating temperature of 0°C~70°C TA
100 pin count
3.3V power supplies

ISPLSI 2064VE-135LTN100 Applications

There are a lot of Lattice Semiconductor Corporation
ISPLSI 2064VE-135LTN100 CPLDs applications.

Address decoders
Custom state machines
Digital systems
Portable digital devices
Handheld digital devices
Battery operated portable devices
Complex programmable logic devices
Digital designs
Field programmable gate
Address decoding

User Guide

PURCHASE

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SHIPPING COST

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SHIPPING METHOD

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DELIVERY TIME

1. Once the goods are shipped, estimated delivery time depends on the shipping methods you chose: FedEx International, 5-7 business days.
2. For in-stock parts, orders normally could be shipped out within 1-2days.