

LATTICE LCMXO1200C-3FT256I
Manufacturer No:
LCMXO1200C-3FT256I
Manufacturer:
Package:
256-LBGA
Description:
3.3V V 1.55mm mm 5.1 ns ns FPGAs MachXO Series 256-LBGA 21mA mA 1mm mm 256
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LCMXO1200C-3FT256I information
LATTICE LCMXO1200C-3FT256I technical specifications, attributes, parameters and parts with similar specifications to LATTICE LCMXO1200C-3FT256I.
- Type
- Parameter
- Mount
- Surface Mount
- Mounting Type
- Surface Mount
- Package / Case
- 256-LBGA
- Number of Pins
- 256
- Operating Temperature
- -40°C~100°C TJ
- Packaging
- Tray
- Series
- MachXO
- Published
- 2009
- JESD-609 Code
- e0
- Pbfree Code
- no
- Part Status
- Obsolete
- Moisture Sensitivity Level (MSL)
- 3 (168 Hours)
- Number of Terminations
- 256
- ECCN Code
- EAR99
- Terminal Finish
- Tin/Lead (Sn63Pb37)
- Additional Feature
- IT CAN ALSO OPERATE AT 2.5V AND 3.3V
- HTS Code
- 8542.39.00.01
- Subcategory
- Field Programmable Gate Arrays
- Technology
- CMOS
- Voltage - Supply
- 1.71V~3.465V
- Terminal Position
- BOTTOM
- Terminal Form
- BALL
- Peak Reflow Temperature (Cel)
- 225
- Supply Voltage
- 1.8V
- Time@Peak Reflow Temperature-Max (s)
- 30
- Base Part Number
- LCMXO1200
- Pin Count
- 256
- Number of Outputs
- 211
- Operating Supply Voltage
- 3.3V
- Operating Supply Current
- 21mA
- Number of I/O
- 211
- Nominal Supply Current
- 21mA
- Memory Type
- SRAM
- Propagation Delay
- 5.1 ns
- Turn On Delay Time
- 5.1 ns
- Programmable Logic Type
- FLASH PLD
- Number of Logic Elements/Cells
- 1200
- Total RAM Bits
- 9421
- Max Frequency
- 500MHz
- Number of LABs/CLBs
- 150
- Output Function
- MACROCELL
- Number of Macro Cells
- 600
- Number of Dedicated Inputs
- 7
- Length
- 17mm
- Height Seated (Max)
- 1.55mm
- Width
- 17mm
- Radiation Hardening
- No
Download datasheets and manufacturer documentation for LATTICE LCMXO1200C-3FT256I.
Datasheets:
ConflictMineralStatement:
LCMXO1200C-3FT256I Overview
As part of the 256-LBGA package, it is included. This kind of FPGA is composed of FLASH PLD. A total of 211 I/Os allow data to be transferred in a more coherent manner. A fundamental building block consists of 1200 logic elements/cells. It is powered from a supply voltage of 1.8V. The Field Programmable Gate Arrays family of FPGA parts includes this part. With a Surface Mount connector, this FPGA module can be attached to the development board. In order to operate it, it requires a voltage supply of 1.71V~3.465V . It is a type of FPGA that belongs to the MachXO series of FPGAs. Fpga chips is important to maintain the operating temperature wFpga chipshin the range of -40°C~100°C TJ when operating the machine. In this device, there are 211 outputs that can be used. In order to save space, this FPGA model has been contained in Tray. There are a total of 256 terminations. This device has 9421 RAM bits, which is the number of RAM bits that this device offers. Its base part number LCMXO1200 can be used to find parts that are related to it. There are 256 pins on this device. The FPGA consists of 150 LABs/CLBs. According to its specifications, this FPGA will be able to work fantastically as long as it is mounted in Surface Mount. Its flexibility can be fully utilized when operating with a 3.3V supply voltage. There are a total of 256 pins on this device. This FPGA can get as fast as 500MHz. Fpga semiconductor operates on 21mA of supply current. In addition to this, it is also characteriIT CAN ALSO OPERATE AT 2.5V AND 3.3Ved by a feature called IT CAN ALSO OPERATE AT 2.5V AND 3.3V. A total of 7 dedicated inputs are available for the detection of the status of the input signals. Fpga circuit is important to note that the main building blocks of a CPLD in this device are 600 macrocells. SRAM memory is adapted for storing data and preventing resource conflicts.
LCMXO1200C-3FT256I Features
211 I/Os
Up to 9421 RAM bits
256 LABs/CLBs
LCMXO1200C-3FT256I Applications
There are a lot of Lattice Semiconductor Corporation
LCMXO1200C-3FT256I FPGAs applications.
- Bioinformatics
- Device controllers
- Software-defined radio
- Random logic
- ASIC prototyping
- Medical imaging
- Computer hardware emulation
- Integrating multiple SPLDs
- Voice recognition
- Cryptography
User Guide
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