AMD XC7K160T-2FB484I
Manufacturer No:
XC7K160T-2FB484I
Manufacturer:
Package:
484-BBGA, FCBGA
Description:
1V V FPGAs Kintex®-7 Series 484-BBGA, FCBGA 1mm mm 484
Quantity:
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XC7K160T-2FB484I Information
AMD XC7K160T-2FB484I technical specifications, attributes, parameters and parts with similar specifications to AMD XC7K160T-2FB484I.
- Type
- Parameter
- Factory Lead Time
- 13 Weeks
- Mount
- Surface Mount
- Mounting Type
- Surface Mount
- Package / Case
- 484-BBGA, FCBGA
- Operating Temperature
- -40°C~100°C TJ
- Packaging
- Tray
- Series
- Kintex®-7
- Published
- 2010
- JESD-609 Code
- e0
- Part Status
- Active
- Type
- Parameter
- Moisture Sensitivity Level (MSL)
- 4 (72 Hours)
- Number of Terminations
- 484
- Terminal Finish
- Tin/Lead (Sn63Pb37)
- Subcategory
- Field Programmable Gate Arrays
- Technology
- CMOS
- Voltage - Supply
- 0.97V~1.03V
- Terminal Position
- BOTTOM
- Terminal Form
- BALL
- Terminal Pitch
- 1mm
- Base Part Number
- XC7K160
Download datasheets and manufacturer documentation for AMD XC7K160T-2FB484I.
Datasheets:
PCN Design/Specification:
PCN Assembly/Origin:
XC7K160T-2FB484I Description
XC7K160T-2FB484I is a member of 7 Series FPGAs. Xilinx® 7 series FPGAs comprise four FPGA families that address the complete range of system requirements, ranging from low cost, small form factor, cost-sensitive, high-volume applications to ultra high-end connectivity bandwidth, logic capacity, and signal processing capability for the most demanding high-performance applications. XC7K160T-2FB484I is optimized for best price-performance with a 2X improvement compared to previous generation, enabling a new class of FPGAs.
XC7K160T-2FB484I Features
Advanced high-performance FPGA logic based on real 6-input lookup table (LUT) technology configurable as distributed memory.
36 Kb dual-port block RAM with built-in FIFO logic for on-chip data buffering.
High-performance SelectIO? technology with support for DDR3 interfaces up to 1,866 Mb/s.
High-speed serial connectivity with built-in multi-gigabit transceivers from 600 Mb/s to max. rates of 6.6 Gb/s up to 28.05 Gb/s, offering a special low-power mode, optimized for chip-to-chip interfaces.
A user configurable analog interface (XADC), incorporating dual 12-bit 1MSPS analog-to-digital converters with on-chip thermal and supply sensors.
DSP slices with 25 x 18 multiplier, 48-bit accumulator, and pre-adder for high-performance filtering, including optimized symmetric coefficient filtering.
XC7K160T-2FB484I Applications
Automotive
Infotainment & cluster
Communications equipment
Wireless infrastructure
Industrial
Motor drives
XC7K160T-2FB484I Relevant information
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