Microchip SY89871UMG
Microchip SY89871UMG

Microchip SY89871UMG

Manufacturer No:

SY89871UMG

Manufacturer:

Microchip

Package:

16-VFQFN Exposed Pad, 16-MLF®

Description:

2.5GHz Any Diff. IN-to-LVPECL Programmable Clock Divider/Fanout Buffer with Internal Termination

Delivery:

DHL
DHL
DHL
DHL

Payment:

DHL
DHL
DHL
DHL
DHL
DHL

In Stock :Available

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SY89871UMG information

Microchip SY89871UMG technical specifications, attributes, parameters and parts with similar specifications to Microchip SY89871UMG.

  • Type
  • Parameter
  • Description
  • 2 Banks (÷1, ÷2, ÷4, ÷8, ÷16); 2 Outputs
  • Input
  • ANY
  • Output
  • LVPECL
  • Supply Voltage
  • 2.5/3.3V
  • Max Freq (GHz)
  • 2.5
  • Icc (mA)
  • 50
  • Max Within Device Skew (ps)
  • \u003c15
  • OE
  • False
  • Input Mux
  • False
  • Number Of Outputs
  • 0
  • Max Prop Delay (ps)
  • 670

Download datasheets and manufacturer documentation for Microchip SY89871UMG.

The SY89871U is a 2.5V/3.3V LVPECL output precision clock divider capable of accepting a high-speed differential clock input (AC or DC-coupled) CML, LVPECL, HSTL or LVDS clock input signal and dividing down the frequency using a programmable divider ratio to create a frequency locked lower speed version of the input clock (Bank B).Available divider ratios are 2, 4, 8 and 16. In a typical 622MHz clock system this would provide availability of 311MHz, 155MHz, 77MHz, or 38MHz auxiliary clock components.

The differential input buffer has a unique internal termination design that allows access to the termination network through a VT pin. This feature allows the device to easily interface to different logic standards. A VREF-AC reference is included for AC-coupled applications.The SY89871U includes two phase-matched output banks. Bank A (QA) is a frequency-matched copy of the input. Bank B (QB0, QB1) is a divided down output of the input frequency. Bank A and Bank B maintain a matched delay independent of the divider setting.

  • Bank A: undivided pass-through (QA)
  • Bank B: programmable divide by 2, 4, 8, 16 (QB0, QB1)
  • Matched delay: all outputs have matched delay, independent of divider setting
  • >2.5GHz fMAX
  • <250ps tr/tf
  • <670ps tpd (matched delay)
  • <15ps within-device skew
  • 231fsRMS phase jitter (typ.)
  • Power supply 3.3V or 2.5V
  • Unique patent-pending input termination and VT pin for DC- and AC-coupled inputs: any differential inputs (LVPECL, LVDS, CML, HSTL)
  • TTL/CMOS inputs for select and reset
  • 100K EP compatible LVPECL outputs
  • Parallel programming capability
  • Wide operating temperature range: -40°C to +85°C
  • Available in 16-pin (3mm x 3mm) QFN package

User Guide

PURCHASE

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MEANS OF PAYMENT

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RFQ (REQUEST FOR QUOTATIONS)

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Provide target prices and acceptable alternatives, if any, to speed up the quotation process.

IMPORTANT NOTICE

Quotations are subject to stock availability and may vary with market conditions. Prices and lead times are not guaranteed until a purchase order is confirmed. Ensure your contact details are correct to avoid delays in response.

Step1:Prepare product

Step1:Prepare product

Step2:Desiccant Protection

Step2:Desiccant Protection

Step3:Vacuum Packaging

Step3:Vacuum Packaging

Step4:Individual Package

Step4:Individual Package

Step5:Anti-collision Filling

Step5:Anti-collision Filling

Step6:Packaging Box

Step6:Packaging Box

SHIPPING COST

1. Shipping starts at $40, but some countries will exceed $40. For example (South Africa, Brazil, India, Pakistan, Israel, etc.).
2. Some specific products need to reach the minimum order quantity.
3. It may cost additional remote fees for delivery if you are in a remote area.

SHIPPING METHOD

Currently, our products are shipped through DHL, FedEx, SF, and UPS.

DELIVERY TIME

1. Once the goods are shipped, estimated delivery time depends on the shipping methods you chose: FedEx International, 5-7 business days.
2. For in-stock parts, orders normally could be shipped out within 1-2days.