Microchip SY100ELT21LZG
Microchip SY100ELT21LZG

Microchip SY100ELT21LZG

Manufacturer No:

SY100ELT21LZG

Manufacturer:

Microchip

Package:

8-SOIC (0.154, 3.90mm Width)

Description:

Differential PECL-to-TTL Translator

User Guide

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Provide target prices and acceptable alternatives, if any, to speed up the quotation process.

IMPORTANT NOTICE

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Step1:Prepare product

Step1:Prepare product

Step2:Desiccant Protection

Step2:Desiccant Protection

Step3:Vacuum Packaging

Step3:Vacuum Packaging

Step4:Individual Package

Step4:Individual Package

Step5:Anti-collision Filling

Step5:Anti-collision Filling

Step6:Packaging Box

Step6:Packaging Box

SHIPPING COST

1. Shipping starts at $40, but some countries will exceed $40. For example (South Africa, Brazil, India, Pakistan, Israel, etc.).
2. Some specific products need to reach the minimum order quantity.
3. It may cost additional remote fees for delivery if you are in a remote area.

SHIPPING METHOD

Currently, our products are shipped through DHL, FedEx, SF, and UPS.

DELIVERY TIME

1. Once the goods are shipped, estimated delivery time depends on the shipping methods you chose: FedEx International, 5-7 business days.
2. For in-stock parts, orders normally could be shipped out within 1-2days.

SY100ELT21LZG Information

Microchip SY100ELT21LZG technical specifications, attributes, parameters and parts with similar specifications to Microchip SY100ELT21LZG.

  • Type
  • Parameter
  • Input
  • LVPECL
  • Supply Voltage
  • 3.3
  • Max Freq (GHz)
  • 0.15
  • Icc (mA)
  • 30
  • OE
  • False
  • Input Mux
  • False
  • Number Of Outputs
  • 0
  • Max Prop Delay (ps)
  • 2500
  • Type
  • Parameter

Download datasheets and manufacturer documentation for Microchip SY100ELT21LZG.

The SY100ELT21L is a single differential LVPECL to- LVTTL translator s using a single +3.3V power supply. Because LVPECL (Low Voltage Positive ECL) levels are used, only +3.3V and ground are required. The small outline 8-lead SOIC package and low skew single gate design make the ELT21L ideal for applications that require the translation of a clock or data signal where minimal space, low power, and low cost are critical. VBB allows a differential, single-ended, or AC-coupled interface to the device. If used, the VBB output should be bypassed to VCC with 0.01µF capacitor. Under open input conditions, the /D will be biased at a VCC/2 voltage level and the D input will be pulled to ground. This condition will force the Q output low to provide added stability. The 100ELT is compatible with positive ECL 100K logic levels.



    • 3.3V power supply
    • 2.0ns typical propagation delay
    • Low power
    • Differential LVPECL inputs
    • 24mA TTL outputs
    • Flow-through pinouts
    • Available in 8-pin SOIC package

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Shipped from:HK Warehouse
Expected Shipping:Fri, Apr 3 - Sat, Apr 4, 2026
Date Code:Within 2 Years

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