Microchip MIC2782EMYCS-TR

Manufacturer No:

MIC2782EMYCS-TR

Manufacturer:

Microchip

Package:

6-UFBGA, WLCSP

Description:

Dual Input Push Button Reset IC with RESET and ANDOUT Outputs

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In Stock :Available

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MIC2782EMYCS-TR information

Microchip MIC2782EMYCS-TR technical specifications, attributes, parameters and parts with similar specifications to Microchip MIC2782EMYCS-TR.

Type
Parameter

Driver Type
Push Button

Min Operating Voltage (V)
1.5

Max Operating Voltage (V)
5.5

Nominal Reset Voltage Min
999999

Nominal Reset Voltage Max
999999

Watchdog Timer
No

Manual Reset
Yes

Power Fail
No

Min Operating Ambient Temperature (°C)
-40

Max Operating Ambient Temperature (°C)
85

Download datasheets and manufacturer documentation for Microchip MIC2782EMYCS-TR.

Data Sheets:

5e97df04e9b6c5d33b42e1d3d6658339.pdf

The MIC2782 is a two input, two output push button reset IC. It will generate a reset pulse for a factory programmed reset timeout period after both manual reset inputs have been held to a logic-low for the factory programmed setup period. The MIC2782 also has an ANDOUT logic output which will activate if both inputs are held low for longer than a debounce time (1.5ms), and deactivate if one or both inputs are released for longer than a debounce time (1.5ms). The RESET and ANDOUT outputs are active-low, open-drain NMOS outputs. The MIC2782 operates over the 1.5V to 5.5V supply voltage range, consuming 2.2µA of supply current at 3.3V. The device features 65kΩinternal pull-up resistors on both of the inputs (/MR1 and /MR2). The device offers factory programmed setup periods of 6s, 8s, 10s, or 12s and reset timeout periods of 0.5s, 1s or 2s. It is available in a space saving, 6-bump, 0.4mm pitch, 0.8mm x 1.2mm Wafer Level Chip Scale Package.

1.5V to 5.5V Operating Supply Voltage Range
2.2µA Supply Current with /MR1, /MR2 not asserted
Factory programmed setup periods of 6s, 8s, 10s, or 12s
Factory programmed reset timeout periods of 0.5s, 1s, or 2s
Integrated 65kΩ /MR1 and /MR2 Pull-Up Resistors
Supports single push button reset with /MR1 tied to /MR2
RESET asserts after /MR1 and /MR2 are asserted low for a setup period
ANDOUT asserts after /MR1 and /MR2 are asserted low for a debounce time (1.5ms)
Open-Drain RESET and ANDOUT Outputs
6-bump, 0.4mm pitch, 0.8mm x 1.2mm Wafer Level Chip Scale Package (WLCSP)

User Guide

PURCHASE

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