

LATTICE LCMXO1200C-4MN132C
Manufacturer No:
LCMXO1200C-4MN132C
Manufacturer:
Package:
132-LFBGA, CSPBGA
Description:
3.3V V 1.35mm mm FPGAs MachXO Series 132-LFBGA, CSPBGA 21mA mA 0.5mm mm 132
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LCMXO1200C-4MN132C information
LATTICE LCMXO1200C-4MN132C technical specifications, attributes, parameters and parts with similar specifications to LATTICE LCMXO1200C-4MN132C.
- Type
- Parameter
- Factory Lead Time
- 8 Weeks
- Mount
- Surface Mount
- Mounting Type
- Surface Mount
- Package / Case
- 132-LFBGA, CSPBGA
- Number of Pins
- 132
- Operating Temperature
- 0°C~85°C TJ
- Packaging
- Tray
- Series
- MachXO
- Published
- 2000
- JESD-609 Code
- e1
- Pbfree Code
- yes
- Part Status
- Active
- Moisture Sensitivity Level (MSL)
- 3 (168 Hours)
- Number of Terminations
- 132
- ECCN Code
- EAR99
- Terminal Finish
- Tin/Silver/Copper (Sn96.5Ag3.0Cu0.5)
- Additional Feature
- IT CAN ALSO OPERATE AT 2.5V AND 3.3V
- HTS Code
- 8542.39.00.01
- Subcategory
- Field Programmable Gate Arrays
- Technology
- CMOS
- Voltage - Supply
- 1.71V~3.465V
- Terminal Position
- BOTTOM
- Terminal Form
- BALL
- Peak Reflow Temperature (Cel)
- 260
- Terminal Pitch
- 0.5mm
- Reach Compliance Code
- not_compliant
- Time@Peak Reflow Temperature-Max (s)
- 40
- Base Part Number
- LCMXO1200
- Pin Count
- 132
- Number of Outputs
- 101
- Qualification Status
- Not Qualified
- Operating Supply Voltage
- 3.3V
- Operating Supply Current
- 21mA
- Number of I/O
- 101
- Nominal Supply Current
- 21mA
- Memory Type
- SRAM
- Propagation Delay
- 4.4 ns
- Programmable Logic Type
- FLASH PLD
- Number of Logic Elements/Cells
- 1200
- Total RAM Bits
- 9421
- Max Frequency
- 550MHz
- Number of LABs/CLBs
- 150
- Output Function
- MACROCELL
- Number of Macro Cells
- 600
- Number of Dedicated Inputs
- 7
- Length
- 8mm
- Height Seated (Max)
- 1.35mm
Download datasheets and manufacturer documentation for LATTICE LCMXO1200C-4MN132C.
Datasheets:
PCN Design/Specification:
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LCMXO1200C-4MN132C Overview
Fpga chips is supplied in the 132-LFBGA, CSPBGA package. This kind of FPGA is composed of FLASH PLD. Fpga chips is programmed wFpga chipsh 101 I/Os for transferring data in a more coherent manner. There are 1200 logic elements/cells to form a fundamental building block. Fpga chips is powered from a supply voltage of 1.8V. This FPGA part belongs to the family of Field Programmable Gate Arrays. This FPGA module can be attached to the development board with a Surface Mount. Fpga chips operates wFpga chipsh a supply voltage of 1.71V~3.465V. It is a type of FPGA belonging to the MachXO seies. The operating temperature should be kept at 0°C~85°C TJ when operating. There are 101 outputs incorporated in this device. This FPGA model is contained in Tray for space saving. Fpga chips is designed wFpga chipsh 132 terminations. The RAM bits that this device offer is 9421. Its base part number LCMXO1200 can be used to find related parts. Fpga electronics is designed wfpga electronics h 132 pins. This FPGA is built as an array of 150 LABs/CLBs. As long as this FPGA is mounted in Surface Mount, it could work fantastically according to its specifications. When operating with the supply voltage of 3.3V, designers can fully make use of its flexibility. Fpga semiconductor is equipped wfpga semiconductorh 132 pin count. This FPGA can get as fast as 550MHz. The supply current used for its operation is 21mA. Fpga semiconductor is also characteriIT CAN ALSO OPERATE AT 2.5V AND 3.3Ved by a feature called IT CAN ALSO OPERATE AT 2.5V AND 3.3V. There are 7 dedicated inputs used to detect the status of input signals. In this device, 600 Macro cells are the main building blocks of a CPLD. The SRAM memory is adopted for storing data and avoiding resource conflicts.
LCMXO1200C-4MN132C Features
101 I/Os
Up to 9421 RAM bits
132 LABs/CLBs
LCMXO1200C-4MN132C Applications
There are a lot of Lattice Semiconductor Corporation
LCMXO1200C-4MN132C FPGAs applications.
- Digital signal processing
- Bioinformatics
- Device controllers
- Software-defined radio
- Random logic
- ASIC prototyping
- Medical imaging
- Computer hardware emulation
- Integrating multiple SPLDs
- Voice recognition
User Guide
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