

LATTICE LC5512MV-45F484C
Manufacturer No:
LC5512MV-45F484C
Manufacturer:
Package:
FPBGA-484
Description:
EE PLD, 5.7ns, 512-Cell, CMOS, PBGA484, FPBGA-484
Quantity:
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LC5512MV-45F484C information
LATTICE LC5512MV-45F484C technical specifications, attributes, parameters and parts with similar specifications to LATTICE LC5512MV-45F484C.
- Type
- Parameter
- Pbfree Code
- No
- RoHS Status
- Non-RoHS Compliant
- Part Life Cycle Code
- Obsolete
- Ihs Manufacturer
- LATTICE SEMICONDUCTOR CORP
- Part Package Code
- BGA
- Package Description
- FPBGA-484
- Pin Count
- 484
- Reach Compliance Code
- not_compliant
- ECCN Code
- 3A991.D
- HTS Code
- 8542.39.00.01
- Samacsys Manufacturer
- Lattice Semiconductor
- Additional Feature
- YES
- In-System Programmable
- YES
- JESD-30 Code
- S-PBGA-B484
- JESD-609 Code
- e0
- JTAG BST
- YES
- Length
- 23 mm
- Moisture Sensitivity Level
- 3
- Number of I/O Lines
- 253
- Number of Macro Cells
- 512
- Number of Terminals
- 484
- Organization
- 0 DEDICATED INPUTS, 253 I/O
- Output Function
- MACROCELL
- Package Body Material
- PLASTIC/EPOXY
- Package Equivalence Code
- BGA484,22X22,40
- Package Shape
- SQUARE
- Package Style
- GRID ARRAY
- Peak Reflow Temperature (Cel)
- 225
- Programmable Logic Type
- EE PLD
- Propagation Delay
- 5.7 ns
- Qualification Status
- Not Qualified
- Seated Height-Max
- 2.6 mm
- Supply Voltage-Max
- 3.6 V
- Supply Voltage-Min
- 3 V
- Supply Voltage-Nom
- 3.3 V
- Surface Mount
- YES
- Technology
- CMOS
- Terminal Finish
- TIN LEAD
- Terminal Form
- BALL
- Terminal Pitch
- 1 mm
- Terminal Position
- BOTTOM
- Time@Peak Reflow Temperature-Max (s)
- 30
- Width
- 23 mm
Download datasheets and manufacturer documentation for LATTICE LC5512MV-45F484C.
Datasheets:
LC5512MV-45F484C Overview
512 macrocells exist, which are cells in a mobile phone network that are primarily composed of high-power towers, antennas, or masts.A 484-BBGA package contains the item.This device has 253 I/O ports programmed into it.It is recommended to package the chip by Tray.During operation, the operating temperature is kept at 0°C~90°C TJ to ensure its reliability.Mount the chip by Surface Mount.This type of FPGA is a part of the ispXPLD® 5000MV series.Chips are programmed with 484 pins.There are related parts in LC5512.If high efficiency is to be achieved, the supply voltage should be maintained at 3.3V.Data storage is performed using EEPROM, SRAM.In this case, Surface Mount is used to mount the electronic component.The 484 pins are designed into the board.A voltage of 3.6V is the maximum supply voltage for this device.A minimum supply voltage of 3V is required for this device to operate.This logic element/block contains 16 logic elements.A total of 176programmable I/Os are available.Ideally, the maximal frequency should be lower than 275MHz Hz.
LC5512MV-45F484C Features
484-BBGA package
253 I/Os
The operating temperature of 0°C~90°C TJ
484 pin count
484 pins
LC5512MV-45F484C Applications
There are a lot of Lattice Semiconductor Corporation
LC5512MV-45F484C CPLDs applications.
- Address decoders
- Custom state machines
- Digital systems
- Portable digital devices
- Handheld digital devices
- Battery operated portable devices
- Complex programmable logic devices
- Digital designs
- Field programmable gate
- Address decoding
User Guide
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Quotations are subject to stock availability and may vary with market conditions. Prices and lead times are not guaranteed until a purchase order is confirmed. Ensure your contact details are correct to avoid delays in response.

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