NEXPERIA 74LVC2G74DP,125
Manufacturer No:
74LVC2G74DP,125
Manufacturer:
Package:
8-TSSOP, 8-MSOP (0.118, 3.00mm Width)
Description:
1.65V~5.5V 200MHz 1 Bit D-Type Flip Flop DUAL 74LVC2G74 8 Pins 40μA 74LVC Series 8-TSSOP, 8-MSOP (0.118, 3.00mm Width)
Quantity:
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74LVC2G74DP,125 Information
NEXPERIA 74LVC2G74DP,125 technical specifications, attributes, parameters and parts with similar specifications to NEXPERIA 74LVC2G74DP,125.
- Type
- Parameter
- Factory Lead Time
- 4 Weeks
- Mounting Type
- Surface Mount
- Package / Case
- 8-TSSOP, 8-MSOP (0.118, 3.00mm Width)
- Surface Mount
- YES
- Number of Pins
- 8
- Number of Elements
- 1
- Operating Temperature
- -40°C~125°C TA
- Packaging
- Tape & Reel (TR)
- Series
- 74LVC
- JESD-609 Code
- e4
- Type
- Parameter
- Part Status
- Active
- Moisture Sensitivity Level (MSL)
- 1 (Unlimited)
- Number of Terminations
- 8
- Type
- D-Type
- Terminal Finish
- Nickel/Palladium/Gold (Ni/Pd/Au)
- Voltage - Supply
- 1.65V~5.5V
- Terminal Position
- DUAL
- Terminal Form
- GULL WING
- Peak Reflow Temperature (Cel)
- 260
- Supply Voltage
- 1.8V
Download datasheets and manufacturer documentation for NEXPERIA 74LVC2G74DP,125.
PCN Assembly/Origin:
PCN Packaging:
RohsStatement:
74LVC2G74DP,125 Overview
It is packaged in the way of 8-TSSOP, 8-MSOP (0.118, 3.00mm Width). D flip flop is embedded in the Tape & Reel (TR) package. The output it is configured with uses Differential. The trigger it is configured with uses Positive Edge. This electronic part is mounted in the way of Surface Mount. It operates with a supply voltage of 1.65V~5.5V. The operating temperature is -40°C~125°C TA. The type of this D latch is D-Type. It is a type of FPGA belonging to the 74LVC series. Its output frequency should not exceed 200MHz. It consumes 40μA of quiescent current without being affected by external factors. There are 8 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. JK flip flop belongs to 74LVC2G74 family. It is powered from a supply voltage of 1.8V. The input capacitance of this T flip flop is 4pF farads, which is defined as the capacitance between the input terminals of an op amp with either input grounded. This D flip flop belongs to the family of LVC/LCX/Z. It is designed with 8 pins. This flip flop is designed with 1 Bits. The maximal supply voltage (Vsup) reaches 5.5V. The output current of 50mA makes it feature maximum design flexibility.
74LVC2G74DP,125 Features
Tape & Reel (TR) package
74LVC series
8 pins
1 Bits
74LVC2G74DP,125 Applications
There are a lot of Nexperia USA Inc.
74LVC2G74DP,125 Flip Flops applications.
- Digital electronics systems
- Computers
- Communications
- Counters
- Frequency Dividers
- Shift Registers
- Storage Registers
- Bounce elimination switch
- Data storage
- Data transfer
74LVC2G74DP,125 Relevant information
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