Renesas 6P61043NLGI
Manufacturer No:
6P61043NLGI
Manufacturer:
Renesas
Package:
Description:
4-Output Small Form Factor PCIe Gen 1-2-3 Buffer for Freescale Systems
Quantity:
In Stock :3542
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Shipped from：HK Warehouse
Expected Shipping：Fri, May 29 - Sat, May 30, 2026
Lead Time：Inquire about availability
Date Code：Within 2 Years
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DELIVERY TIME1. Once the goods are shipped, estimated delivery time depends on the shipping methods you chose: FedEx International, 5-7 business days.
2. For in-stock parts, orders normally could be shipped out within 1-2days.
6P61043NLGI Information
Renesas 6P61043NLGI technical specifications, attributes, parameters and parts with similar specifications to Renesas 6P61043NLGI.
- Type
- Parameter
- Lead Count (#)
- 32
- Carrier Type
- Tray
- Moisture Sensitivity Level (MSL)
- 3
- Qty. per Reel (#)
- 0
- Qty. per Carrier (#)
- 490
- Pb (Lead) Free
- Yes
- Pb Free Category
- e3 Sn
- Temp. Range
- -40 to +85°C
- Accepts Spread Spec Input
- Yes
- Additive Phase Jitter Typ RMS (fs)
- 100
- Type
- Parameter
- Additive Phase Jitter Typ RMS (ps)
- 0.1
- Advanced Features
- HW PLL mode control, Multiple SMBus addresses
- App Jitter Compliance
- PCIe Gen1, PCIe Gen2, PCIe Gen3
- Architecture
- Common, SRNS
- C-C Jitter Max P-P (ps)
- 50
- Core Voltage (V)
- 1.8
- Diff. Input Signaling
- HCSL
- Diff. Inputs
- 1
- Diff. Output Signaling
- LP-HCSL
- Diff. Outputs
- 4
Download datasheets and manufacturer documentation for Renesas 6P61043NLGI.
The 6P61043 is a 4-output very-low power buffer for 100MHz PCIe Gen 1, Gen 2, and Gen 3 applications with integrated output terminations providing Zo = 100Ω for Freescale Systems. The device has four output enables for clock management and three selectable SMBus addresses.
- Integrated terminations provide differential Zo = 100Ω: reduced component count and board space
- 1.8V operation: minimal power consumption
- OE# pins: support DIF power management
- HCSL compatible differential input: can be driven by common clock sources
- LP-HCSL differential clock outputs: reduced power and board space
- Programmable Slew rate for each output: allows tuning for various line lengths
- Programmable output amplitude: allows tuning for various application environments.
- Pin/Software selectable PLL bandwidth and PLL bypass: minimize phase jitter for each application
- Outputs blocked until PLL is locked: clean system start-up
- Software selectable 50MHz or 125MHz PLL operation: useful for Ethernet applications
- Configuration can be accomplished with strapping pins: SMBus interface is not required for device control
- 3.3V tolerant SMBus interface works with legacy controllers
- Space saving 32-pin 5mm x 5mm MLF: minimal board space
- Selectable SMBus addresses: multiple devices can easily share an SMBus segment
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12.28 M
Listed Part Number
3,000+
Leading Manufacturers
4.9 M
In-stock SKU
15,000+
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