Microchip ZL30631LDG1S
Manufacturer No:
ZL30631LDG1S
Manufacturer:
Microchip
Package:
Description:
SyncE Network Synchronizer with 1 Independent Channel
Quantity:
In Stock :5160
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Shipping & Availability
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Shipped from：HK Warehouse
Expected Shipping：Mon, Jun 1 - Tue, Jun 2, 2026
Lead Time：Inquire about availability
Date Code：Within 2 Years
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PURCHASE
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SHIPPING COST
1. Shipping starts at $40, but some countries will exceed $40. For example (South Africa, Brazil, India, Pakistan, Israel, etc.).
2. Some specific products need to reach the minimum order quantity.
3. It may cost additional remote fees for delivery if you are in a remote area.
Currently, our products are shipped through DHL, FedEx, SF, and UPS.
DELIVERY TIME1. Once the goods are shipped, estimated delivery time depends on the shipping methods you chose: FedEx International, 5-7 business days.
2. For in-stock parts, orders normally could be shipped out within 1-2days.
ZL30631LDG1S Information
Microchip ZL30631LDG1S technical specifications, attributes, parameters and parts with similar specifications to Microchip ZL30631LDG1S.
- Type
- Parameter
- 5G Product
- Yes
- DataCenter
- Yes
- FiveGRAN
- Yes
- IEEE1588
- No
- SmartGrids
- Yes
- SyncE
- Yes
- Wireline
- Yes
- Type
- Parameter
Download datasheets and manufacturer documentation for Microchip ZL30631LDG1S.
Product Brief:
The ZL30631 is a feature-rich network synchronization solution with up to four independent DPLLs and five extremely low output jitter synthesizers. This solution is ideal for Synchronous Ethernet (SyncE) central timing applications such as routers, switches, optical transparent network and 4G/5G wireless base stations (CU/DU/RU).
We also have ZL3064x as line card jitter attenuators, such as ZL30642A, to form full SyncE&IEEE1588 Timing solution for any rack system.
- Highlights
- Ultra Precise Timing for 5G Radio Access Networks
- One independent DPLL clock channel plus three additional DPLLs for NCO Hybrid, Split XO and redundant oscillator modes
- Five output synthesizers
- Any-to-any frequency conversion per channel
- Inputs: up to 10, differential or single-ended
- Outputs: up to 10 differential, up to 20 CMOS
- Output jitter 100 fs RMS typical for 156.25 MHz 12 kHz to 20 MHz
- Core power consumption <0.9W
- Physical-layer frequency synchronization
- Physical-layer compliance with ITU-T G.8262, G.8262.1, G.813, G.812, Telcordia GR-1244, GR-253
- Enables 5G wireless applications with sub-100 ns time/phase alignment requirements
- Hitless reference switching
- General Features
- Automatic self-configuration at power-up from internal Flash memory, 7 configurations
- Input-to-output alignment <100 ps
- Numerically controlled oscillator behavior in each DPLL and each synthesizer
- Easy-to-configure design requires no external VCXO or loop filter components
- 5 GPIO pins with many possible behaviors, each REF can be GPI, each OUT can be GPO
- SPI or I2C processor Interface
- 1.8V and 3.3V core VDD voltages
- Easy-to-use evaluation/programming software
AIChipLink – Your Trusted Electronic Components Distributor
12.28 M
Listed Part Number
3,000+
Leading Manufacturers
4.9 M
In-stock SKU
15,000+
Warehouse Area(㎡)
