Microchip ZL30105QDG1
Manufacturer No:
ZL30105QDG1
Manufacturer:
Package:
64-TQFP
Description:
Stratum 3 Redundant System Clock Synchronizer for T1/E1/SDH, Advanced TCA and H.110
Quantity:
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ZL30105QDG1 Information
Microchip ZL30105QDG1 technical specifications, attributes, parameters and parts with similar specifications to Microchip ZL30105QDG1.
- Type
- Parameter
- Type
- General Purpose
- Inputs
- 3
- CMOS Outputs
- 11
- Low-Jitter Synthesizers
- 0
- Typical Jitter (12kHz-20MHz) fs RMS
- Up to OC-3/STM-1
- Diff InputFreq. Range
- 2 kHz, 8 kHz, 1.544 MHz, 2.048 MHz, 8.192 MHz, 16.384 MHz or 19.44 MHz
- Output Freq Range
- 65.536 MHz
- Type
- Parameter
Download datasheets and manufacturer documentation for Microchip ZL30105QDG1.
Data Sheets:
The ZL30105 is intended to be the central timing and synchronization resource for network equipment that complies with ITU-T, Telcordia, ETSI and ANSI network specifications.
- Accepts three input references and synchronizes to any combination of 2, 8 kHz, 1.544, 2.048, 8.192, 16.384 or 19.44 MHz inputs
- Synchronizes to clock-and-sync-pair to maintain minimal phase skew between redundant system clocks
- Provides a range of clock outputs: 1.544, 2.048, 3.088, 16.384, and 19.44 MHz, and either 4.096 and 8.192 MHz or 32.768 and 65.536 MHz, and a choice of 6.312, 8.448, 44.736 or 34.368 MHz
- Provides 5 styles of 8 kHz framing pulses and a 2 kHz multi-frame pulse
- Ultra-low jitter of less than 20 psRMS on the 19.44 MHz clock
- Less than 600 psp-p intrinsic jitter on all the other clock and frame pulse outputs
- Holdover frequency accuracy of 1x10-8
- Simple hardware control interface offers manual or automatic hitless reference switching
- Supports ITU-T G.813 option 1, G.823 for 2048 kbs and G.824 for 1544 kbs interfaces
- Supports Telcordia GR-1244-CORE Stratum 3/4/4E
- Supports ANSI T1.403 and ETSI ETS 300 011 for ISDN primary rate interfaces
ZL30105QDG1 Relevant information
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