Texas Instruments TDA2EGADQABCQ1
Manufacturer No:
TDA2EGADQABCQ1
Manufacturer:
Texas Instruments
Package:
Description:
SoC processors with graphics and video acceleration for ADAS applications (23mm package)
Quantity:
In Stock :4781
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Expected Shipping：Sat, May 30 - Sun, May 31, 2026
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Date Code：Within 2 Years
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TDA2EGADQABCQ1 Information
Texas Instruments TDA2EGADQABCQ1 technical specifications, attributes, parameters and parts with similar specifications to Texas Instruments TDA2EGADQABCQ1.
- Type
- Parameter
- Arm CPU
- 1 Arm Cortex-A15
- Arm (max) (MHz)
- 500, 800
- Coprocessors
- 4 Arm Cortex-M4
- CPU
- 1 Arm Cortex-A15
- Graphics acceleration
- 1 2D, 1 3D
- Display type
- 1 HDMI, 3 LCD
- Protocols
- Ethernet
- Ethernet MAC
- 2-Port 1Gb switch
- PCIe
- 2 PCIe Gen 3
- Hardware accelerators
- Image video accelerator
- Type
- Parameter
- Features
- Vision Analytics
- Operating system
- Android, Linux, RTOS
- Security
- Cryptography, Debug security, Device identity, Isolation firewalls, Secure boot, Secure storage & programming, Software IP protection
- Rating
- Automotive
- Operating temperature range (°C)
- -40 to 125
- Package
- FCBGA (ABC)
- Pins
- 760
- Size
- 529 mm² 23 x 23
- REACH Status
- —
- RoHS Status
Download datasheets and manufacturer documentation for Texas Instruments TDA2EGADQABCQ1.
Data sheet:
Application note:
User guide:
EVM User's guide:
Functional safety information:
Product overview:
White paper:
Technical article:
TI’s new TDA2Ex System-on-Chip (SoC) is a highly optimized and scalable family of devices designed to meet the requirements of leading Advanced Driver Assistance Systems (ADAS). The TDA2Ex family enables broad ADAS applications in today’s automobile by integrating an optimal mix of performance, low power, and ADAS vision analytics processing that aims to facilitate a more autonomous and collision-free driving experience.
The TDA2Ex SoC enables sophisticated embedded vision technology in today’s automobile by enabling a board range of ADAS applications including park assist, surround view and sensor fusion on a single architecture.
The TDA2Ex SoC incorporates a heterogeneous, scalable architecture that includes a mix of TI’s fixed and floating-point TMS320C66x digital signal processor (DSP) generation core, Arm® Cortex®-A15 MPCore™ and dual-Arm® Cortex®-M4 processors. The integration of a video accelerator for decoding multiple video streams over an Ethernet AVB network, along with graphics accelerator for rendering virtual views, enable a 3D viewing experience. The TDA2Ex SoC also integrates a host of peripherals including multicamera interfaces (both parallel and serial, including CSI-2) to enable Ethernet or LVDS-based surround view systems, displays and GigB Ethernet AVB.
Additionally, TI provides a complete set of development tools for the Arm® and DSP, including C compilers, a DSP assembly optimizer to simplify programming and scheduling, and a debugging interface for visibility into source code execution.
Cryptographic acceleration is available in all devices. All other supported security features, including support for secure boot, debug security and support for trusted execution environment is available on High-Security (HS) devices. For more information about HS devices, contact your TI representative.
The TDA2Ex ADAS processor is qualified according to the AEC-Q100 standard.
- Architecture designed for ADAS applications
- Video, image, and graphics processing support
- Full-HD video (1920 × 1080p, 60 fps)
- Multiple video inputs and video outputs
- Arm® Cortex®-A15 microprocessor subsystem
- C66x floating-point VLIW DSP cores
- Fully object-code compatible with C67x and C64x+
- Up to thirty-two 16 × 16-bit fixed-point multiplies per cycle
- Up to 512KB of on-chip L3 RAM
- Level 3 (L3) and level 4 (L4) interconnects
- DDR3/DDR3L External Memory Interface (EMIF) module
- Supports up to DDR3-1333 (667 MHz)
- Up to 2GB across single chip select
- Dual Arm® Cortex®-M4 Image Processing Units (IPU)
- IVA-HD subsystem
- Display subsystem
- Display controller with DMA engine and up to three pipelines
- HDMI™ encoder: HDMI 1.4a and DVI 1.0 compliant
- Single-core PowerVR® SGX544 3D GPU
- 2D-graphics accelerator (BB2D) subsystem
- Vivante® GC320 core
- Video Processing Engine (VPE)
- One Video Input Port (VIP) module
- Support for up to four multiplexed input ports
- General-Purpose Memory Controller (GPMC)
- Enhanced Direct Memory Access (EDMA) controller
- 2-Port Gigabit Ethernet switch
- Up to two external ports, one internal
- Sixteen 32-bit general-purpose timers
- 32-bit MPU watchdog timer
- Six high speed Inter-Integrated Circuit (I2C™) ports
- Ten configurable UART/IrDA/CIR modules
- Four Multichannel Serial Peripheral Interfaces (McSPI)
- Quad Serial Peripheral Interface (QSPI™)
- SATA interface
- Eight Multichannel Audio Serial Port (McASP) modules
- SuperSpeed USB 3.0 dual-role device
- High Speed USB 2.0 dual-role device
- High Speed USB 2.0 on-the-go
- Four MultiMedia Card/Secure Digital®/Secure Digital Input Output interfaces (MMC™/SD®/SDIO)
- PCI-Express® (PCIe®) revision 3.0 Port with integrated PHY
- One 2-lane gen2-compliant port
- or Two 1-lane gen2-compliant ports
- Dual Controller Area Network (DCAN) modules
- CAN 2.0B protocol
- MIPI® Camera Serial Interface 2 (CSI-2)
- Up to 215 General-Purpose I/O (GPIO) pins
- Real-Time Clock subsystem (RTCSS)
- Device Security Features
- Hardware crypto accelerators and DMA
- Firewalls
- JTAG lock
- Secure keys
- Secure ROM and boot
- Customer programmable keys (Silicon Revision 2.1)
- Power, reset, and clock management
- On-chip debug with CTools technology
- 28-nm CMOS technology
- 23 mm × 23 mm, 0.8-mm Pitch, 760-Pin BGA (ABC)
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