Texas Instruments SN74CB3T3253PWRG4
Texas Instruments SN74CB3T3253PWRG4

Texas Instruments SN74CB3T3253PWRG4

Manufacturer No:

SN74CB3T3253PWRG4

Manufacturer:

Texas Instruments

Package:

Description:

3.3-V, 4:1, 2-channel FET bus switch with level shifter

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Expected Shipping:Sun, May 17 - Mon, May 18, 2026
Date Code:Within 2 Years

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SN74CB3T3253PWRG4 Information

Texas Instruments SN74CB3T3253PWRG4 technical specifications, attributes, parameters and parts with similar specifications to Texas Instruments SN74CB3T3253PWRG4.

  • Type
  • Parameter
  • Configuration
  • 4:1
  • Number of channels
  • 2
  • Power supply voltage - single (V)
  • 2.5, 3.3
  • Protocols
  • Analog
  • Ron (typ) (Ω)
  • 5
  • CON (typ) (pF)
  • 4
  • ON-state leakage current (max) (µA)
  • 20
  • Bandwidth (MHz)
  • 100
  • Operating temperature range (°C)
  • -40 to 85
  • Features
  • Powered-off protection, Signal path translation
  • Type
  • Parameter
  • Input/output continuous current (max) (mA)
  • 128
  • Rating
  • Catalog
  • Drain supply voltage (max) (V)
  • 3.6
  • Supply voltage (max) (V)
  • 3.6
  • Package
  • SOIC (D)
  • Pins
  • 16
  • Size
  • 59.4 mm² 9.9 x 6
  • Package
  • SSOP (DBQ)
  • Pins
  • 16
  • Size
  • 29.4 mm² 4.9 x 6

The SN74CB3T3253 is a high-speed TTL-compatible FET multiplexer/demultiplexer with low ON-state resistance (ron), allowing for minimal propagation delay. The device fully supports mixed-mode signal operation on all data I/O ports by providing voltage translation that tracks VCC. The SN74CB3T3253 supports systems using 5V TTL, 3.3V LVTTL, and 2.5V CMOS switching standards, as well as user-defined switching levels (see Typical DC Voltage-Translation Characteristics).

This device is fully specified for partial-power-down applications using Ioff. The Ioff feature establishes that damaging current does not backflow through the device when it is powered down. The device has isolation during power off.

  • Output voltage translation tracks VCC
  • Supports mixed-mode signal operation on all data I/O ports
    • 5V input down to 3.3V output level shift with 3.3V VCC
    • 5V/3.3V input down to 2.5V output level shift with 2.5V VCC
  • 5V tolerant I/Os with device powered up or powered down
  • Bidirectional data flow with near-zero propagation delay
  • Low ON-state resistance (ron) characteristics (ron = 5Ω typ)
  • Low input/output capacitance minimizes loading (Cio(OFF) = 5pF typ)
  • Data and control inputs provide undershoot clamp diodes
  • Low power consumption (ICC = 20µA max)
  • VCC operating range from 2.3V to 3.6V
  • Data I/Os support 0V to 5V signaling levels (0.8V, 1.2V, 1.5V, 1.8V, 2.5V, 3.3V, 5V)
  • Control inputs can be driven by TTL or 5V/3.3V CMOS outputs
  • Ioff supports partial-power-down mode operation
  • Latch-up performance exceeds 250mA per JESD 17
  • ESD performance tested per JESD 22
    • 2000V human-body model (A114-B, Class II)
    • 1000V charged-device model (C101)