Texas Instruments SN74ABT373PWRG4

Manufacturer No:

SN74ABT373PWRG4

Manufacturer:

Texas Instruments

Package:

Description:

Octal Transparent D-Type Latches With 3-State Outputs

Quantity:

In Stock :6808

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Expected Shipping：Thu, May 7 - Fri, May 8, 2026

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Date Code：Within 2 Years

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SN74ABT373PWRG4 Information

Texas Instruments SN74ABT373PWRG4 technical specifications, attributes, parameters and parts with similar specifications to Texas Instruments SN74ABT373PWRG4.

Type
Parameter

Number of channels
8

Technology family
ABT

Supply voltage (min) (V)
4.5

Supply voltage (max) (V)
5.5

Input type
TTL-Compatible CMOS

Output type
3-State

Clock frequency (max) (MHz)
150

IOL (max) (mA)
64

IOH (max) (mA)
-32

Supply current (max) (µA)
30000

Type
Parameter

Features
Partial power down (Ioff), Power up 3-state, Very high speed (tpd 5-10ns)

Operating temperature range (°C)
-40 to 85

Rating
Catalog

Package
PDIP (N)

Pins
20

Size
228.702 mm² 24.33 x 9.4

Package
SOIC (DW)

Pins
20

Size
131.84 mm² 12.8 x 10.3

Package
SOP (NS)

Download datasheets and manufacturer documentation for Texas Instruments SN74ABT373PWRG4.

The eight latches of the 'ABT373 are transparent D-type latches. While the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the logic levels set up at the D inputs.

A buffered output-enable (OE\) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components.

OE\ does not affect the internal operations of the latches. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.

To ensure the high-impedance state during power up or power down, OE\ should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN54ABT373 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ABT373 is characterized for operation from -40°C to 85°C.

State-of-the-Art EPIC-II B^TM BiCMOS Design Significantly Reduces Power Dissipation
Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17
Typical V_OLP (Output Ground Bounce) < 1 V at V_CC = 5 V, T_A = 25°C
High-Drive Outputs (-32-mA I_OH, 64-mA I_OL)
Package Options Include Plastic Small-Outline (DW), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW) Packages, Ceramic Chip Carriers (FK), Ceramic Flat (W) Package, and Plastic (N) and Ceramic (J) DIPs