Texas Instruments SN0144ALR-DC
Manufacturer No:
SN0144ALR-DC
Manufacturer:
Texas Instruments
Package:
Description:
Radiation-hardness-assured (RHA), 300-krad, 12-bit, dual 5.2-GSPS or single 10.4-GSPS ADC
Quantity:
In Stock :3550
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Expected Shipping：Fri, May 29 - Sat, May 30, 2026
Lead Time：Inquire about availability
Date Code：Within 2 Years
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SN0144ALR-DC Information
Texas Instruments SN0144ALR-DC technical specifications, attributes, parameters and parts with similar specifications to Texas Instruments SN0144ALR-DC.
- Type
- Parameter
- Sample rate (max) (Msps)
- 5200, 10400
- Resolution (Bits)
- 12
- Number of input channels
- 1, 2
- Interface type
- JESD204B, JESD204C
- Analog input BW (MHz)
- 7900
- Features
- Ultra High Speed
- Rating
- Space
- Peak-to-peak input voltage range (V)
- 0.825
- Power consumption (typ) (mW)
- 4000
- Architecture
- Folding Interpolating
- Type
- Parameter
- SNR (dB)
- 55.6
- ENOB (Bits)
- 8.8
- SFDR (dB)
- 65
- Operating temperature range (°C)
- -55 to 125
- Input buffer
- Yes
- Radiation, TID (typ) (krad)
- 300
- Radiation, SEL (MeV·cm2/mg)
- 120
- Package
- FCCSP (ALR)
- Pins
- 144
- Size
- 100 mm² 10 x 10
Download datasheets and manufacturer documentation for Texas Instruments SN0144ALR-DC.
Radiation & reliability report:
Application brief:
Technical article:
Data sheet:
The ADC12DJ5200-SP device is an RF-sampling, giga-sample, analog-to-digital converter (ADC) that can directly sample input frequencies from DC to above 10GHz. ADC12DJ5200-SP can be configured as a dual-channel, 5.2GSPS ADC or single-channel, 10.4GSPS ADC. Support of a useable input frequency range of up to 10GHz enables direct RF sampling of L-band, S-band, C-band, and X-band for frequency agile systems.
The ADC12DJ5200-SP uses a high-speed JESD204C output interface with up to 16 serialized lanes supporting up to 17.16Gbps line rate. Deterministic latency and multi-device synchronization is supported through JESD204C subclass-1. The JESD204C interface can be configured to trade-off line rate and number of lanes. Both 8b/10b and 64b/66b data encoding schemes are supported. 64b/66b encoding supports forward error correction (FEC) for improved bit error rates. The interface is backwards compatible with JESD204B receivers.
Innovative synchronization features, including noiseless aperture delay adjustment and SYSREF windowing, simplify system design for multichannel applications. Optional digital down converters (DDCs) are available to provide digital conversion to base-band and to reduce the interface rate. A programmable FIR filter allows on-chip equalization.
- Radiation Tolerance:
- Total Ionizing Dose (TID): 300krad (Si)
- Single Event Latchup (SEL): 120MeV-cm2/mg
- Single Event Upset (SEU) immune registers
- ADC core:
- 12-bit resolution
- Up to 10.4GSPS in single-channel mode
- Up to 5.2GSPS in dual-channel mode
- Performance specifications:
- Noise floor (–20dBFS, VFS = 1VPP-DIFF):
- Dual-channel mode: –151.8dBFS/Hz
- Single-channel mode: –154.4dBFS/Hz
- ENOB (dual channel, FIN = 2.4GHz): 8.6 Bits
- Noise floor (–20dBFS, VFS = 1VPP-DIFF):
- Buffered analog inputs with VCMI of 0V:
- Analog input bandwidth (–3dB): 8GHz
- Usable input frequency range: > 10GHz
- Full-scale input voltage (VFS, default): 0.8VPP
- Noiseless aperture delay (tAD) adjustment:
- Precise sampling control: 19fs Step
- Simplifies synchronization and interleaving
- Temperature and voltage invariant delays
- Easy-to-use synchronization features:
- Automatic SYSREF timing calibration
- Time stamp for sample marking
- JESD204C serial data interface:
- Maximum lane rate: 17.16Gbps
- Support for 64b/66b and 8b/10b encoding
- 8b/10b modes are JESD204B compatible
- Optional digital down-converters (DDC):
- 4x, 8x, 16x and 32x complex decimation
- Four independent 32-Bit NCOs per DDC
- Peak RF Input Power (Diff): +26.5dBm (+ 27.5dBFS, 560x fullscale power)
- Programmable FIR filter for equalization
- Power consumption: 4W
- Power supplies: 1.1V, 1.9V
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12.28 M
Listed Part Number
3,000+
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In-stock SKU
15,000+
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