Microchip SM8LC05E3/TR13
Manufacturer No:
SM8LC05E3/TR13
Manufacturer:
Microchip
Package:
8-SOIC (0.154, 3.90mm Width)
Description:
TVS array Bi-Directional
Quantity:
In Stock :2749
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Expected Shipping：Sun, Jun 14 - Mon, Jun 15, 2026
Lead Time：Inquire about availability
Date Code：Within 2 Years
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SM8LC05E3/TR13 Information
Microchip SM8LC05E3/TR13 technical specifications, attributes, parameters and parts with similar specifications to Microchip SM8LC05E3/TR13.
- Type
- Parameter
- Device Name
- SM8LC05-e3
- Device Type
- TVS
- Peak Pulse Power [max] (1ms) PPP (W)
- 500
- Rated Standoff Voltage (Vwm)
- 5
- ID Max Stand-by Current (µA)
- 40
- Breakdown Voltage [min] V(BR) @I(BR) (V)
- 6
- Test Current IBR(mA)
- 1
- Clamping Voltage [max] Vc @ Ipp=1A (V)
- 9.8
- Clamping Voltage [max] Vc @ Ipp=5A (V)
- 11
- Capacitance @ 0V f = 1 MHz (pF) Max
- 25
- Type
- Parameter
Download datasheets and manufacturer documentation for Microchip SM8LC05E3/TR13.
Data Sheets:
This TRANSIENT VOLTAGE SUPPRESSOR (TVS) array is packaged in an SO-8 configuration giving protection to 2 Bidirectional data or interface lines. It is designed for use in applications where protections required at the board level from voltage transients caused by electrostatic discharge (ESD) as defined in IEC 1000-4-2, electrical fast transients (EFT) per IEC 1000-4-4 and effects of secondary lighting.These TVS arrays have a peak power rating of 500 watts for an 8/20µsec pulse. This array is suitable for protection of sensitive circuitry consisting of TTL, CMOS DRAM’s, SRAM’s, HCMOS, HSIC microprocessors, and I/O transceivers. The SM8LCXX product provides board level protection from static electricity and other induced voltage surges that can damage sensitive circuitry.
Protects up to 2 Bidirectional lines
Protects up to 2 Bidirectional lines
- Molded SO-8 Surface Mount
- Surge protection Per IEC 1000-4-2, IEC 1000-4-4
- Weight: 0.066 grams (approximate)
- Provides electrically isolated protection
- Marking: Logo, device number, date code
- SO-8 Packaging
- Pin #1 defined by DOT on top of package
- Low capacitance of 25 Pf per line pair
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