Renesas SLG47011-EV

The SLG47011-E provides a small, low power solution for commonly used analog-to-digital conversion and mixed-signal functions. A flexible data acquisition system used in conjunction with configurable logic provides a way to implement a wide variety of functions with minimal cost. The user can create a circuit design by programming the one-time programmable (OTP) Non-Volatile Memory (NVM), to configure the interconnect logic, the macrocells, and the IO pins.

• SAR ADC
  • Selectable Resolution: 14-, 12-, 10-, 8-bit
  • Up to 2.35Msps in 8-bit mode
  • Sampling up to Four Analog Channels
  • Output Options: Parallel, I²C, SPI
• Programmable Gain Amplifier
  • Gain Range: 1x to 64x
  • Supports Differential and Single-Ended Modes
• MathCore
  • Multiplier, Adder, Subtractor, Shifter
• Four Independent Data Buffers
  • Buffer Length: up to Eight 16-bit Words
  • Modes: Oversampling, Moving Average, Counter Capture
• Memory Table Macrocell
  • 4096 Words × 12-bit
  • Modes: Full Range or Two Ranges
  • Supports ADC Data Linearization or Custom y = F(x)
  • ADDR-to-DATA / Storage Modes
• 16-bit Multichannel Digital Comparator (MDCMP)
  • Up to Four Independent Channels
  • Static or Dynamic Threshold
  • Hysteresis Option for Each Channel
• PWM Macrocell
  • 12-bit Resolution
  • Dynamic Duty Cycle Change (up to 4096 values)
• Width Converter Macrocell
  • 12-bit Parallel Data Output
  • Optional Output: 12×1-bit, 6×2-bit, 3×4-bit
• 12-bit DAC
  • 333ksps Digital-to-Analog Converter
• Selectable Current Source
• Integrated Voltage References (V_REF)
• High Speed Analog Comparator
  • Configurable Hysteresis and Reference
• Combination Function Macrocells (18 total)
  • 2×2-bit LUT or DFF/LATCH
  • 8×3-bit LUT or DFF/LATCH with Set/Reset
  • 6×DFF/LATCH or 3-bit LUT or Shift Registers
  • 2×4-bit LUT or DFF/LATCH with Set/Reset
• Multi-Function Macrocells (14 total)
  • 10× DFF/LATCH or 3-bit LUT + 12-bit Delay/Counter
  • 2× DFF/LATCH or 4-bit LUT + 16-bit Delay/Counter/FSM
  • 1× DFF/LATCH or 3-bit LUT + 12-bit Delay/Counter/FSM
  • 12-bit Memory Control Up/Down Counter
• Communication Interfaces
  • I²C Interface
  • SPI Interface
• Logic and Timing
  • Programmable Delay with Edge Detector Output
  • Deglitch Filter or Edge Detector
• Oscillators (OSC)
  • 2kHz / 10kHz
  • 20MHz / 40MHz
• Analog Temperature Sensor
• Power-On Reset (POR) with CRC
• Read Back Protection (Read Lock)
• Power Supply
  • 1.71V to 3.6V
• Operating Temperature
  • -40°C to +105°C
• Compliance
  • RoHS Compliant / Halogen-Free
• Available Package
  • 16-pin STQFN: 2.0mm × 2.0mm × 0.55mm, 0.4mm pitch