Renesas RC19108AGND#KB0
Manufacturer No:
RC19108AGND#KB0
Manufacturer:
Renesas
Package:
Description:
1.8V PCIe Gen7 8-Output Clock Buffer
Quantity:
In Stock :5921
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Shipped from：HK Warehouse
Expected Shipping：Sun, May 31 - Mon, Jun 1, 2026
Lead Time：Inquire about availability
Date Code：Within 2 Years
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DELIVERY TIME1. Once the goods are shipped, estimated delivery time depends on the shipping methods you chose: FedEx International, 5-7 business days.
2. For in-stock parts, orders normally could be shipped out within 1-2days.
RC19108AGND#KB0 Information
Renesas RC19108AGND#KB0 technical specifications, attributes, parameters and parts with similar specifications to Renesas RC19108AGND#KB0.
- Type
- Parameter
- Pkg. Type
- VFQFPN
- Lead Count (#)
- 40
- Carrier Type
- Reel
- Moisture Sensitivity Level (MSL)
- 1
- Qty. per Reel (#)
- 2500
- Qty. per Carrier (#)
- 0
- Pb (Lead) Free
- Yes
- Pb Free Category
- e3 Sn
- Temp. Range
- -40 to 105°C
- Additive Jitter
- 4fs
- Type
- Parameter
- Additive Phase Jitter Typ RMS (fs)
- 33
- Additive Phase Jitter Typ RMS (ps)
- 0.033
- Advanced Features
- Automatic Clock Parking, Flexible Power Sequencing and more...
- App Jitter Compliance
- PCIe Gen1, PCIe Gen2, PCIe Gen3, PCIe Gen4, PCIe Gen5, PCIe Gen6, PCIe Gen7
- Architecture
- Common, SRIS, SRNS
- Core Voltage (V)
- 1.8, 1.8
- Diff. Inputs
- 1
- Diff. Output Signaling
- LP-HCSL
- Diff. Outputs
- 8
- Family Name
- RC191
Download datasheets and manufacturer documentation for Renesas RC19108AGND#KB0.
The RC19108 is a 1.8V 8-output PCIe Gen7 buffer that is backward compatible with earlier PCIe generations. The RC19108 provides ultra-low additive jitter and reduced in-to-out delay performance for better design margin and incorporates several features for easier and more robust design.
- PCIe Gen5 additive phase jitter: 6fs RMS
- PCIe Gen6 additive phase jitter: 4fs RMS
- PCIe Gen7 additive phase jitter: 2.6fs RMS
- DB2000Q additive phase jitter: 10fs RMS
- 12kHz to 20MHz additive phase jitter: 33fs RMS at 156.25MHz
- Power Down Tolerant (PDT) inputs
- Flexible Startup Sequencing (FSS)
- Automatic Clock Parking (ACP) upon loss of CLKIN
- Spread-spectrum tolerant
- CLKIN accepts HCSL or LVDS signal levels
- -40 °C to +105 °C, 1.8V ± 5% operation
- Pin or SMBus selectable:
- 33Ω, 85Ω, or 100Ω differential output impedance
- Output slew rate
- Output amplitude (A001 suffix)
- 9 SMBus addresses plus write protection
AIChipLink – Your Trusted Electronic Components Distributor
12.28 M
Listed Part Number
3,000+
Leading Manufacturers
4.9 M
In-stock SKU
15,000+
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