Renesas RC19013A100GNG#BB0
Manufacturer No:
RC19013A100GNG#BB0
Manufacturer:
Renesas
Package:
Description:
Application Specific Clock/Timing RoHS
Quantity:
In Stock :4872
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Shipped from：HK Warehouse
Expected Shipping：Mon, Jun 8 - Tue, Jun 9, 2026
Lead Time：Inquire about availability
Date Code：Within 2 Years
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Step2：Desiccant Protection
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DELIVERY TIME1. Once the goods are shipped, estimated delivery time depends on the shipping methods you chose: FedEx International, 5-7 business days.
2. For in-stock parts, orders normally could be shipped out within 1-2days.
RC19013A100GNG#BB0 Information
Renesas RC19013A100GNG#BB0 technical specifications, attributes, parameters and parts with similar specifications to Renesas RC19013A100GNG#BB0.
- Type
- Parameter
- Lead Count (#)
- 56
- Carrier Type
- Tray
- Moisture Sensitivity Level (MSL)
- 3
- Output Impedance
- 100
- Power Consumption Typ (mW)
- 320
- Qty. per Reel (#)
- 0
- Qty. per Carrier (#)
- 260
- Pb (Lead) Free
- Yes
- Pb Free Category
- e3 Sn
- Temp. Range
- -40 to 105°C
- Type
- Parameter
- Country of Assembly
- Taiwan
- Country of Wafer Fabrication
- Taiwan
- Price (USD) | 1ku
- 2.86423
- Additive Phase Jitter Typ RMS (fs)
- 30
- Adjustable Phase
- No
- Advanced Features
- Flexible Power Sequencing, Loss of Signal Indicator, Power Down Tolerant, Automatic Clock Parking, SMBus Write Protection
- App Jitter Compliance
- PCIe Gen1, PCIe Gen2, PCIe Gen3, PCIe Gen4, PCIe Gen5, PCIe Gen6, PCIe Gen7
- Architecture
- Common, SRIS, SRNS
- Channels (#)
- 2
- Core Voltage (V)
- 3.3
Download datasheets and manufacturer documentation for Renesas RC19013A100GNG#BB0.
Datasheet:
The RC19013 is a 13-output PCIe Gen7 buffer that is backward compatible with earlier PCIe generations. The RC19013 provides ultra-low additive jitter and reduced in-to-out delay performance for better design margin and incorporates several features for easier and more robust design.
- LP-HCSL outputs eliminate up to 52 terminated resistors
- PCIe Gen 1–7 compliance
- Drive both source-terminated and double-terminated loads
- Selectable output slew rate via pin
- Support both 85Ω and 100Ω output impedance versions
- Open-drain LOS (Loss-Of-Signal) indication output
- Power down tolerance (PDT)
- Flexible startup sequencing (FSS)
- Automatic clock parking (ACP)
- Dedicated OE# pins to control group output
- 4-wire Side-Band interface and device daisy-chaining
- SMBus write protection features with 9 selectable addresses
- 7mm × 7mm 56-VFQFPN package
AIChipLink – Your Trusted Electronic Components Distributor
12.28 M
Listed Part Number
3,000+
Leading Manufacturers
4.9 M
In-stock SKU
15,000+
Warehouse Area(㎡)
