




Microchip PIC24F16KA102T-I/ML
Manufacturer No:
PIC24F16KA102T-I/ML
Manufacturer:
Package:
28-VQFN Exposed Pad
Description:
The PIC24F KA1 is a low power microcontroller for very cost sensitive applications requiring 16 MIPS performance and advanced low power modes for optimal power savings
Quantity:
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PIC24F16KA102T-I/ML Information
Microchip PIC24F16KA102T-I/ML technical specifications, attributes, parameters and parts with similar specifications to Microchip PIC24F16KA102T-I/ML.
- Type
- Parameter
- CPU Type
- 16-bit PIC MCU
- CPU Speed Max MHz (megahertz)
- 16
- Program Memory Size (KB)
- 16
- Multiple Flash Panels
- No
- Direct Memory Access (DMA) Channels
- 0
- Temp. Range Min.(C°)
- -40
- Temp. Range Max.(C°)
- 125
- Operation Voltage Min.(V)
- 1.8
- Operation Voltage Max.(V)
- 3.6
- Pin Count
- 28
- Type
- Parameter
- Low Power
- Yes
- Number of Comparators
- 2
- ADC Modules
- 1
- ADC Channels
- 9
- ADC Resolution Max
- 10
- ADC Sampling Rate (ksps)
- 500
- Number of DACs
- 0
- DAC outputs
- 0
- Max DAC Resolution (bits)
- 0
- Hardware RTCC
- No
Download datasheets and manufacturer documentation for Microchip PIC24F16KA102T-I/ML.
Legacy Collaterals:
Data Sheets:
Programming Specifications:
Reference Manual:
Supporting Collateral:
Application Notes:
Brochures:
User Guide:
- Typical nanoWatt XLP specifications include:
- 20nA Deep Sleep mode
- 25nA Sleep mode (RAM retention)
- 500nA Real Time Clock & Calendar operation in Sleep modes
- 400nA Watch Dog Timer operation in Sleep modes
- 512 Bytes of Data EEPROM
- Other Low Power Specifications include:
- 5uS wake-up from Sleep
- 50nA I/O port leakage
- 195uA at 1MHz Run mode
- Power Modes: Run, Doze, Idle, Sleep, Deep Sleep
- System Supervisors: Low Power BOR, WDT, INT0 and RTCC
- Internal oscillator support - 31 kHz to 8 MHz, up to 32 MHz with 4X PLL
- Fail-Safe Clock Monitor – allows safe shutdown if clock fails
- CPU:
- Up to 16 MIPS performance
- Single Cycle Instruction Execution
- 16 x 16 Hardware Multiply, & 32-bit x 16-bit Hardware Divider
- C Compiler Optimized Instruction Set System
- Peripherals:
- 10-bit Differential ADC, 9 channels, 500k samples per second, 16-deep result buffer
- Charge Time Measurement Unit (CTMU) enabling 9 channels of Capacitive Touch
- Two Analog rail-to-rail comparators Peripherals
- 2 UART Modules with LIN and IrDA support, 4 Deep FIFO
- SPI Modules with 8 Deep FIFO
- I2C™ Modules with Master and Slave Modes
- Hardware RTCC, Real-Time Clock Calendar with Alarms
PIC24F16KA102T-I/ML Relevant information
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