Microchip MD1213K6-G
Microchip MD1213K6-G

Microchip MD1213K6-G

Manufacturer No:

MD1213K6-G

Manufacturer:

Microchip

Package:

12-VQFN Exposed Pad

Description:

HIGH SPEED DUAL MOSFET DRIVER

User Guide

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Step1：Prepare product

Step1：Prepare product

Step2：Desiccant Protection

Step2：Desiccant Protection

Step3：Vacuum Packaging

Step3：Vacuum Packaging

Step4：Individual Package

Step4：Individual Package

Step5：Anti-collision Filling

Step5：Anti-collision Filling

Step6：Packaging Box

Step6：Packaging Box

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MD1213K6-G Information

Microchip MD1213K6-G technical specifications, attributes, parameters and parts with similar specifications to Microchip MD1213K6-G.

  • Type
  • Parameter
  • # of Channels
  • 2
  • Input Voltage min (V)
  • 1.2
  • Input Voltage max (V)
  • 5
  • Output Voltage Bipolar (V)
  • ±5.0
  • Output Voltage Unipolar (V)
  • 0 - 12
  • Package
  • QFN-12
  • Type
  • Parameter

Download datasheets and manufacturer documentation for Microchip MD1213K6-G.

Application Notes:

Data Sheets:

User Guide:

MD1213 is a high speed, dual MOSFET driver. It is designed to drive high voltage P and N-channel MOSFET transistors for medical ultrasound and other applications requiring a high output current for a capacitive load. The high-speed input stage of the MD1213 can operate from 1.8 to 5.0V logic interface with an optimum operating input signal range of 1.8 to 3.3V. An adaptive threshold circuit is used to set the level translator switch threshold to the average of the input logic 0 and logic 1 levels. The input logic levels may be ground referenced, even though the driver is putting out bipolar signals. The level translator uses a proprietary circuit, which provides DC coupling together with high-speed operation. The output stage of the MD1213 has separate power connections enabling the output signal L and H levels to be chosen independently from the supply voltages used for the majority of the circuit. As an example, the input logic levels may be 0 and 1.8V, the control logic may be powered by +5.0 to -5.0V, and the output L and H levels may be varied anywhere over the range of -5.0 to +5.0V. The output stage is capable of peak currents of up to ±2.0A, depending on the supply voltages used and load capacitance present. The OE pin serves a dual purpose. First, its logic H level is used to compute the threshold voltage level for the channel input level translators. Secondly, when OE is low, the outputs are disabled, with the A output high and the B output low. This assists in properly pre-charging the AC coupling capacitors that may be used in series in the gate drive circuit of an external PMOS and NMOS transistor pair.

    • 6.0ns rise and fall time with 1000pF load
    • 2.0A peak output source/sink current
    • 1.8 to 5.0V input CMOS compatible
    • 4.5 to 13V total supply voltage
    • Smart logic threshold
    • Low jitter design
    • Two matched channels
    • Outputs can swing below ground
    • Low inductance package
    • Thermally-enhanced package

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Shipped from：HK Warehouse
Expected Shipping：Mon, Mar 30 - Tue, Mar 31, 2026
Date Code：Within 2 Years

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