
ONSEMI MC74LVX259DTR2G
Manufacturer No:
MC74LVX259DTR2G
Manufacturer:
Package:
16-TSSOP (0.173, 4.40mm Width)
Description:
8-Bit Addressable Latch/1-of-8 Decoder CMOS Logic Level Shifter
Quantity:
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MC74LVX259DTR2G information
ONSEMI MC74LVX259DTR2G technical specifications, attributes, parameters and parts with similar specifications to ONSEMI MC74LVX259DTR2G.
- Type
- Parameter
- MSL Temp (°C)
- 260
- Channels
- 1
- VCC Min (V)
- 2
- IO Max (mA)
- 4
- Case Outline
- 948F-01
- MSL Type
- 1
- Container Qty.
- 2500
- Type
- Latch
- VCC Max (V)
- 3.6
- tpd Max (ns)
- 12
- Package Type
- TSSOP-16
- Container Type
- REEL
Download datasheets and manufacturer documentation for ONSEMI MC74LVX259DTR2G.
Datasheet:
Package Drawing:
The MC74LVX259 is an 8-bit Addressable Latch fabricated with silicon gate CMOS technology.The internal circuit is composed of three stages, including a buffer output which provides high noise immunity and stable output.The LVX259 is designed for general purpose storage applications in digital systems. The device has four modes of operation as shown in the mode selection table.. In the addressable latch mode, the data on Data In is written into the addressed latch. The addressed latch follows the data input with all non-addressed latches remaining in their previous states. In the memory mode, all latches remain in their previous state and are unaffected by the Data or Address inputs. In the one-of-eight decoding or demultiplexing mode, the addressed output follows the state of Data In with all other outputs in the LOW state. In the Reset mode, all outputs are LOW and unaffected by the address and data inputs. When operating the LVX259 as an addressable latch, changing more than one bit of the address ould impose a transient wrong address. Therefore, this should only be done while in thememory mode. The MC74LVX259 input structure provides protection when voltages up to 7 V are applied, regardless of the supply voltage. This allows the MC74LVX259 to be used to interface 5 V circuits to 3 V circuits.
Feature
- High Speed: tPD = 7.0 ns (Typ) at VCC = 3.3 V
- Low Power Dissipation: ICC = 2 µA (Max) at TA = 25°C
- High Noise Immunity: VNIH = VNIL = 28% VCC
- CMOS-Compatible Outputs: VOH > 0.8 VCC ; VOL < 0.1 VCC @Load
- Power Down Protection Provided on Inputs and Outputs
- Balanced Propagation Delays
- Pin and Function Compatible with Other Standard Logic Families
- Latchup Performance Exceeds 300 mA
- ESD Performance: HBM > 2000 V; Machine Model > 200 V
- Pb-Free Packages are Available*
User Guide
Please verify all part numbers, quantities, and packaging preferences before placing your order. If substitutions are acceptable, please indicate this clearly. For time-sensitive projects, confirm estimated delivery dates and stock availability in advance. Once submitted, changes or cancellations may not be possible, especially for items marked as non-cancellable/non-returnable (NCNR). For international shipments, please ensure all import documentation is complete and accurate to avoid delays.
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