
ONSEMI MC100LVEP111FAG
Manufacturer No:
MC100LVEP111FAG
Manufacturer:
Package:
32-LQFP
Description:
2.5 V / 3.3 V 2:1:10 Differential ECL/PECL/HSTL Clock / Data Fanout Buffer
Quantity:
Delivery:




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In Stock :Available
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MC100LVEP111FAG information
ONSEMI MC100LVEP111FAG technical specifications, attributes, parameters and parts with similar specifications to ONSEMI MC100LVEP111FAG.
- Type
- Parameter
- Package Type
- LQFP-32
- Container Type
- JTRAY
- Channels
- 1
- Input / Output Ratio
- 2:1:10
- VCC Typ (V)
- 3.3
- fmaxClock Typ (MHz)
- 3000
- fmaxData Typ (Mbps)
- -
- Case Outline
- 561AB
- MSL Type
- 2
- MSL Temp (°C)
- 260
- Container Qty.
- 250
- tJitterRMS Typ (ps)
- 0.2
- tR & tF Max (ps)
- 255
- Output Level
- ECL
- tpd Typ (ns)
- 0.43
- Type
- Buffer
- Input Level
- CML
- tskew(o-o) Max (ps)
- 25
Download datasheets and manufacturer documentation for ONSEMI MC100LVEP111FAG.
Datasheet:
Package Drawing:
The MC100LVEP111 is a low skew 2:1:10 differential driver, designed with clock distribution in mind, accepting two clock sources into an input multiplexer. The PECL input signals can be either differential or single-ended (if the VBB output is used). HSTL inputs can be used when the LVEP111 is operating under PECL conditions.The LVEP111 specifically guarantees low output-to-output skew.Optimal design, layout, and processing minimize skew within a device and from device to device. To ensure tightest skew, both sides of differential outputs identically terminate into 50 ohms even if only one side is being used. When fewer than all ten pairs are used, identically terminate all the output pairs on the same package side whether used or unused. If no outputs on a single side are used, then leave these outputs open (unterminated). This will maintain minimum output skew. Failure to do this will result in a 10-20 ps loss of skew margin (propagation delay) in the output(s) in use.
Application
- General purpose clock and data distribution for Networking, ATE and Computing
Feature
- 85 ps Typical Device-to-Device Skew
- 20 ps Typical Output-to-Output Skew
- Jitter Less than 1 ps RMS
- Additive RMS Phase Jitter: 60fs @156.25MHz, Typical
- Maximum Frequency >3 Ghz Typical
- VBB Output
- 430 ps Typical Propagation Delay
- The 100 Series Contains Temperature Compensation
- PECL and HSTL Mode Operating Range: VCC = 2.375 V to 3.8 V with VEE = 0 V
- NECL Mode Operating Range: VCC = 0 V with VEE = -2.375 V to -3.8 V
- Open Input Default State
- LVDS Input Compatible
User Guide
Please verify all part numbers, quantities, and packaging preferences before placing your order. If substitutions are acceptable, please indicate this clearly. For time-sensitive projects, confirm estimated delivery dates and stock availability in advance. Once submitted, changes or cancellations may not be possible, especially for items marked as non-cancellable/non-returnable (NCNR). For international shipments, please ensure all import documentation is complete and accurate to avoid delays.
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Quotations are subject to stock availability and may vary with market conditions. Prices and lead times are not guaranteed until a purchase order is confirmed. Ensure your contact details are correct to avoid delays in response.

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DELIVERY TIME1. Once the goods are shipped, estimated delivery time depends on the shipping methods you chose: FedEx International, 5-7 business days.
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