ONSEMI MC100LVEL91DWG

ONSEMI MC100LVEL91DWG

Manufacturer No:

MC100LVEL91DWG

Manufacturer:

ONSEMI

Package:

20-SOIC (0.295, 7.50mm Width)

Description:

Translator, Triple LVPECL / PECL Input to ECL Output

User Guide

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Step1：Prepare product

Step1：Prepare product

Step2：Desiccant Protection

Step2：Desiccant Protection

Step3：Vacuum Packaging

Step3：Vacuum Packaging

Step4：Individual Package

Step4：Individual Package

Step5：Anti-collision Filling

Step5：Anti-collision Filling

Step6：Packaging Box

Step6：Packaging Box

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SHIPPING METHOD

Currently, our products are shipped through DHL, FedEx, SF, and UPS.

DELIVERY TIME

1. Once the goods are shipped, estimated delivery time depends on the shipping methods you chose: FedEx International, 5-7 business days.
2. For in-stock parts, orders normally could be shipped out within 1-2days.

MC100LVEL91DWG Information

ONSEMI MC100LVEL91DWG technical specifications, attributes, parameters and parts with similar specifications to ONSEMI MC100LVEL91DWG.

  • Type
  • Parameter
  • Output Level
  • ECL
  • VCC Typ (V)
  • 5
  • fMax Typ (MHz)
  • 600
  • tR & tF Max (ps)
  • 580
  • MSL Type
  • 3
  • Container Type
  • TUBE
  • Channels
  • 3
  • Input Level
  • ECL
  • tpd Typ (ns)
  • 0.62
  • Package Type
  • SOIC-20W
  • Type
  • Parameter
  • Case Outline
  • 751D-05
  • MSL Temp (°C)
  • 260
  • Container Qty.
  • 38

Download datasheets and manufacturer documentation for ONSEMI MC100LVEL91DWG.

Datasheet:

Package Drawing:

The MC100LVEL91 is a triple LVPECL input to ECL output translator. The device receives standard or low voltage differential PECL signals, determined by the VCC supply level, and translates them to differential -3.3 V to -5.0 V ECL output signals. (For translation from 5.0 V PECL to -5 V ECL output, see MC100EL91.)To accomplish the level translation the LVEL91 requires three power rails. The VCC supply should be connected to the positive supply, and the VEE pin should be connected to the negative power supply. The GND pins are connected to the system ground plane. Both VEE and VCC should be bypassed to ground via 0.01 µF capacitors. Under open input conditions, the Dbar input will be biased at VCC/2 and the D input will be pulled to GND. This condition will force the Q output to a low, ensuring stability.The VBB pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to VBB as a switching reference voltage. VBB may also rebias AC coupled inputs. When used, decouple VBB and VCC via a 0.01 µF capacitor and limit current sourcing or sinking to 0.5 mA. When not used, VBB should be left open.

Feature

  • 620 ps Typical Propagation Delay
  • The 100 Series Contains Temperature Compensation
  • Operating Range: VCC = 3.8 V to 3.3 V; VEE = -3.0 V to -3.8 V; GND= 0 V
  • Q Output will Default LOW with Inputs Open or at GND
  • Pb-Free Packages are Available

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Shipped from：HK Warehouse
Expected Shipping：Fri, Apr 10 - Sat, Apr 11, 2026
Date Code：Within 2 Years

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