ONSEMI MC100EP35DG
Manufacturer No:
MC100EP35DG
Manufacturer:
Package:
8-SOIC (0.154, 3.90mm Width)
Description:
-3V~-5.5V 3GHz 2 Bit JK Type Flip Flop DUAL 100EP35 8 Pins 100EP Series 8-SOIC (0.154, 3.90mm Width)
Quantity:


In Stock :3396
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MC100EP35DG Information
ONSEMI MC100EP35DG technical specifications, attributes, parameters and parts with similar specifications to ONSEMI MC100EP35DG.
- Type
- Parameter
- Lifecycle Status
- LIFETIME (Last Updated: 1 month ago)
- Factory Lead Time
- 4 Weeks
- Mount
- Surface Mount
- Mounting Type
- Surface Mount
- Package / Case
- 8-SOIC (0.154, 3.90mm Width)
- Number of Pins
- 8
- Operating Temperature
- -40°C~85°C TA
- Packaging
- Tube
- Series
- 100EP
- Published
- 2000
- Type
- Parameter
- JESD-609 Code
- e3
- Pbfree Code
- yes
- Part Status
- Obsolete
- Moisture Sensitivity Level (MSL)
- 1 (Unlimited)
- Number of Terminations
- 8
- Type
- JK Type
- Terminal Finish
- Tin (Sn)
- Additional Feature
- NECL MODE: VCC = 0V WITH VEE = -3V TO -5.5V
- Subcategory
- FF/Latches
- Packing Method
- RAIL
Download datasheets and manufacturer documentation for ONSEMI MC100EP35DG.
Datasheets:
MC100EP35DG Overview
As a result, it is packaged as 8-SOIC (0.154, 3.90mm Width). The package Tubecontains it. Currently, the output is configured to use Differential. It is configured with a trigger that uses Positive Edge. The electronic part is mounted in the way of Surface Mount. A voltage of -3V~-5.5Vis used as the supply voltage. -40°C~85°C TAis the operating temperature. This D latch has the type JK Type. It belongs to the 100EPseries of FPGAs. There should be no greater frequency than 3GHzon its output. In 8terminations, a transmission line is terminated with a JK flip flop that matches its characteristic impedance. This D latch belongs to the family of 100EP35. The power supply voltage is 3.3V. In this case, the electronic component is mounted in the way of Surface Mount. The electronic flip flop is designed with pins 8. Its clock edge trigger type is Positive Edge. The part is included in FF/Latches. The flip flop is designed with 2bits. 5.5Vis the maximum supply voltage (Vsup). Normally, the supply voltage (Vsup) should be kept above 3V. As a result of its reliability, this D flip flop is ideally suited for RAIL. There are -4.5V power supplies attached to it. A high level of efficiency can be achieved by maintaining the supply voltage at 4.25V. Its output current of 50mAallows for maximum design flexibility. It is designed with 1 output lines. NECL MODE: VCC = 0V WITH VEE = -3V TO -5.5Vis also one of its characteristics. High level output current is set to -50mA. Low level output current is set to 50mA.
MC100EP35DG Features
Tube package
100EP series
8 pins
2 Bits
-4.5V power supplies
MC100EP35DG Applications
There are a lot of ON Semiconductor
MC100EP35DG Flip Flops applications.
- Computers
- Communications
- Counters
- Frequency Dividers
- Shift Registers
- Storage Registers
- Bounce elimination switch
- Data storage
- Data transfer
- Latch
MC100EP35DG Relevant information
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