
ONSEMI MC100EP139DWG
Manufacturer No:
MC100EP139DWG
Manufacturer:
Package:
20-SOIC (0.295, 7.50mm Width)
Description:
3.3 V / 5.0 V ECL ÷·2/4, ÷·4/5/6 Clock Generator Chip
Quantity:
Delivery:




Payment:







In Stock :Available
Price not displayed? Please send an RFQ, and we will respond immediately.
MC100EP139DWG information
ONSEMI MC100EP139DWG technical specifications, attributes, parameters and parts with similar specifications to ONSEMI MC100EP139DWG.
- Type
- Parameter
- fMax Typ (MHz)
- 1000
- tpd Typ (ns)
- 0.75
- MSL Type
- 3
- MSL Temp (°C)
- 260
- Container Type
- TUBE
- Container Qty.
- 38
- Type
- Divider
- VCC Typ (V)
- 5
- tR & tF Max (ps)
- 250
- Package Type
- SOIC-20W
- Case Outline
- 751D-05
- Input Level
- CML
- Output Level
- ECL
Download datasheets and manufacturer documentation for ONSEMI MC100EP139DWG.
Datasheet:
Package Drawing:
The MC10/100EP139 is a low skew divide by 2/4, divide by 4/5/6 clock generation chip designed explicitly for low skew clock generation applications. The internal dividers are synchronous to each other, therefore, the common output edges are all precisely aligned. The device can be driven by either a differential or single-ended ECL or, if positive power supplies are used, LVPECL input signals. In addition, by using the VBB output, a sinusoidal source can be AC coupled into the device. If a single-ended input is to be used, the VBB output should be connected to the CLKbar input and bypassed to ground via a 0.01uF capacitor.The common enable (ENbar) is synchronous so that the internal dividers will only be enabled/disabled when the internal clock is already in the LOW state. This avoids any chance of generating a runt clock pulse on the internal clock when the device is enabled/disabled as can happen with an asynchronous control. The internal enable flip-flop is clocked on the falling edge of the input clock, therefore, all associated specification limits are referenced to the negative edge of the clock input. Upon startup, the internal flip-flops will attain a random state; therefore, for systems which utilize multiple EP139s, the master reset (MR) input must be asserted to ensure synchronization. For systems which only use one EP139, the MR pin need not be exercised as the internal divider design ensures synchronization between the divide by 2/4 and the divide by 4/5/6 outputs of a single device. All VCC and VEE pins must be externally connected to power supply to guarantee proper operation.The 100 Series contains temperature compensation.
Application
- Low-Clock Skew Generation
Feature
- Maximum Frequency >1.0 GHz Typical
- 50ps Output-to-Output Skew
- PECL Mode Operating Range: VCC=3.0 V to 5.5 V with VEE = 0 V
- NECL Mode Operating Range: VCC = 0 V with VEE = -3.0 V to -5.5 V
- Open Input Default State
- Safety Clamp on Inputs
- Synchronous Enable/Disable
- Master Reset for Synchronization of Multiple Chips
- VBB Output
- Pb-Free Packages are Available
User Guide
Please verify all part numbers, quantities, and packaging preferences before placing your order. If substitutions are acceptable, please indicate this clearly. For time-sensitive projects, confirm estimated delivery dates and stock availability in advance. Once submitted, changes or cancellations may not be possible, especially for items marked as non-cancellable/non-returnable (NCNR). For international shipments, please ensure all import documentation is complete and accurate to avoid delays.
MEANS OF PAYMENTFor your convenience, we accept multiple payment methods in USD, including PayPal, Credit Card, and Wire Transfer. Net terms may be available for qualified customers upon approval.
RFQ (REQUEST FOR QUOTATIONS)Please ensure the part numbers and quantities are accurate and complete when submitting your RFQ.
Provide target prices and acceptable alternatives, if any, to speed up the quotation process.
Quotations are subject to stock availability and may vary with market conditions. Prices and lead times are not guaranteed until a purchase order is confirmed. Ensure your contact details are correct to avoid delays in response.

Step1:Prepare product

Step2:Desiccant Protection

Step3:Vacuum Packaging

Step4:Individual Package

Step5:Anti-collision Filling

Step6:Packaging Box
1. Shipping starts at $40, but some countries will exceed $40. For example (South Africa, Brazil, India, Pakistan, Israel, etc.).
2. Some specific products need to reach the minimum order quantity.
3. It may cost additional remote fees for delivery if you are in a remote area.
Currently, our products are shipped through DHL, FedEx, SF, and UPS.
DELIVERY TIME1. Once the goods are shipped, estimated delivery time depends on the shipping methods you chose: FedEx International, 5-7 business days.
2. For in-stock parts, orders normally could be shipped out within 1-2days.
MC100EP139DWG Relevant information
The following parts are popular search parts in Integrated Circuits (ICs).
AIChipLink – Your Trusted Electronic Components Distributor
12.28 M
Listed Part Number3,000+
Leading Manufacturers4.9 M
In-stock SKU15,000+
Warehouse Area(㎡)

.png&w=256&q=75)


