NXP LPC1833JET100E
Manufacturer No:
LPC1833JET100E
Manufacturer:
Package:
100-TFBGA
Description:
512KB 512K x 8 FLASH ARM® Cortex®-M3 32-Bit Microcontroller LPC18xx Series LPC1833 3.3V 100-TFBGA
Quantity:
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LPC1833JET100E Information
NXP LPC1833JET100E technical specifications, attributes, parameters and parts with similar specifications to NXP LPC1833JET100E.
- Type
- Parameter
- Factory Lead Time
- 12 Weeks
- Mounting Type
- Surface Mount
- Package / Case
- 100-TFBGA
- Surface Mount
- YES
- Operating Temperature
- -40°C~105°C TA
- Packaging
- Tray
- Series
- LPC18xx
- Published
- 2010
- Part Status
- Active
- Moisture Sensitivity Level (MSL)
- 3 (168 Hours)
- Type
- Parameter
- Number of Terminations
- 100
- Subcategory
- Microcontrollers
- Technology
- CMOS
- Terminal Position
- BOTTOM
- Terminal Form
- BALL
- Supply Voltage
- 3.3V
- Terminal Pitch
- 0.8mm
- Base Part Number
- LPC1833
- Pin Count
- 100
- JESD-30 Code
- S-PBGA-B100
Download datasheets and manufacturer documentation for NXP LPC1833JET100E.
Datasheets:
Environmental Information:
LPC1833JET100E Description
The ARM Cortex-M3 based LPC185x/3x/2x/1x microcontrollers are designed for embedded applications. With system improvements like reduced power consumption, improved debug tools, and a high level of support block integration, the ARM Cortex-M3 is a next-generation core.
Operating at CPU frequencies of up to 180 MHz are the LPC185x/3x/2x/1x. The ARM Cortex-M3 CPU uses a Harvard architecture with a three-stage pipeline, independent local instruction and data buses, and a third bus for peripherals. Additionally, the inbuilt prefetch unit of the ARM Cortex-M3 CPU allows speculative branching.
The LPC185x/3x/2x/1x features a quad SPI Flash Interface (SPIFI), a State-configurable Timer/PWM (SCTimer/PWM) subsystem, up to 1 MB of flash memory, 136 kB of on-chip SRAM, 16 kB of EEPROM memory, two High-speed USB controllers, Ethernet, LCD, an external memory controller, and numerous digital and analog peripherals.
LPC1833JET100E Features
Up to 1 MB on-chip dual bank flash memory with flash accelerator.
16 kB on-chip EEPROM data memory.
136 kB SRAM for code and data use.
Multiple SRAM blocks with separate bus access.
64 kB ROM containing boot code and on-chip software drivers.
64 bit+ 256 bit of One-Time Programmable (OTP) memory for general-purpose use.
Quad SPI Flash Interface (SPIFI) with 1-, 2-, or 4-bit data at rates of up to 52 MB per second.
10/100T Ethernet MAC with RMII and MII interfaces and DMA support for high throughput at low CPU load. Support for IEEE 1588 time stamping/advanced time stamping (IEEE 1588-2008 v2).
One High-speed USB 2.0 Host/Device/OTG interface with DMA support and on-chip high-speed PHY (USB0).
One High-speed USB 2.0 Host/Device interface with DMA support, on-chip full-speed PHY and ULPI interface to an external high-speed PHY (USB1).
USB interface electrical test software included in ROM USB stack.
LPC1833JET100E Applications
Industrial
RFID readers
Consumer
e-Metering
White goods
LPC1833JET100E Relevant information
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