

LATTICE LCMXO2280C-3FTN256C
Manufacturer No:
LCMXO2280C-3FTN256C
Manufacturer:
Package:
256-LBGA
Description:
3.3V V 1.55mm mm 5.1 ns ns FPGAs MachXO Series 420MHz MHz 256-LBGA 23mA mA 1mm mm 256
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LCMXO2280C-3FTN256C information
LATTICE LCMXO2280C-3FTN256C technical specifications, attributes, parameters and parts with similar specifications to LATTICE LCMXO2280C-3FTN256C.
- Type
- Parameter
- Factory Lead Time
- 8 Weeks
- Mount
- Surface Mount
- Mounting Type
- Surface Mount
- Package / Case
- 256-LBGA
- Number of Pins
- 256
- Operating Temperature
- 0°C~85°C TJ
- Packaging
- Tray
- Series
- MachXO
- Published
- 2007
- JESD-609 Code
- e1
- Pbfree Code
- yes
- Part Status
- Active
- Moisture Sensitivity Level (MSL)
- 3 (168 Hours)
- Number of Terminations
- 256
- Termination
- SMD/SMT
- ECCN Code
- EAR99
- Terminal Finish
- Tin/Silver/Copper (Sn95.5Ag4.0Cu0.5)
- Additional Feature
- IT CAN ALSO OPERATE AT 2.5V AND 3.3V
- HTS Code
- 8542.39.00.01
- Subcategory
- Field Programmable Gate Arrays
- Technology
- CMOS
- Voltage - Supply
- 1.71V~3.465V
- Terminal Position
- BOTTOM
- Terminal Form
- BALL
- Supply Voltage
- 1.8V
- Terminal Pitch
- 1mm
- Frequency
- 420MHz
- Time@Peak Reflow Temperature-Max (s)
- 40
- Base Part Number
- LCMXO2280
- Pin Count
- 256
- Number of Outputs
- 211
- Operating Supply Voltage
- 3.3V
- Operating Supply Current
- 23mA
- Number of I/O
- 211
- Memory Type
- SRAM
- Propagation Delay
- 5.1 ns
- Turn On Delay Time
- 5.1 ns
- Programmable Logic Type
- FLASH PLD
- Number of Logic Elements/Cells
- 2280
- Total RAM Bits
- 28262
- Number of LABs/CLBs
- 285
- Output Function
- MACROCELL
- Number of Macro Cells
- 1140
- Number of Dedicated Inputs
- 7
- Length
- 17mm
- Height Seated (Max)
- 1.55mm
- Width
- 17mm
Download datasheets and manufacturer documentation for LATTICE LCMXO2280C-3FTN256C.
Datasheets:
PCN Design/Specification:
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LCMXO2280C-3FTN256C Overview
Fpga chips is supplied in the 256-LBGA package. This kind of FPGA is composed of FLASH PLD. Fpga chips is programmed wFpga chipsh 211 I/Os for transferring data in a more coherent manner. There are 2280 logic elements/cells to form a fundamental building block. Fpga chips is powered from a supply voltage of 1.8V. This FPGA part belongs to the family of Field Programmable Gate Arrays. This FPGA module can be attached to the development board with a Surface Mount. Fpga chips operates wFpga chipsh a supply voltage of 1.71V~3.465V. It is a type of FPGA belonging to the MachXO seies. The operating temperature should be kept at 0°C~85°C TJ when operating. There are 211 outputs incorporated in this device. This FPGA model is contained in Tray for space saving. Fpga chips is designed wFpga chipsh 256 terminations. The RAM bits that this device offer is 28262. Its base part number LCMXO2280 can be used to find related parts. Fpga electronics is designed wfpga electronics h 256 pins. This FPGA is built as an array of 285 LABs/CLBs. As long as this FPGA is mounted in Surface Mount, it could work fantastically according to its specifications. When operating with the supply voltage of 3.3V, designers can fully make use of its flexibility. Fpga semiconductor is equipped wfpga semiconductorh 256 pin count. Fpga semiconductor operates at a frequency of 420MHz to deliver high efficiency. The supply current used for its operation is 23mA. Fpga semiconductor is also characteriIT CAN ALSO OPERATE AT 2.5V AND 3.3Ved by a feature called IT CAN ALSO OPERATE AT 2.5V AND 3.3V. There are 7 dedicated inputs used to detect the status of input signals. In this device, 1140 Macro cells are the main building blocks of a CPLD. The SRAM memory is adopted for storing data and avoiding resource conflicts.
LCMXO2280C-3FTN256C Features
211 I/Os
Up to 28262 RAM bits
256 LABs/CLBs
Operating from a frequency of 420MHz
LCMXO2280C-3FTN256C Applications
There are a lot of Lattice Semiconductor Corporation
LCMXO2280C-3FTN256C FPGAs applications.
- Digital signal processing
- Bioinformatics
- Device controllers
- Software-defined radio
- Random logic
- ASIC prototyping
- Medical imaging
- Computer hardware emulation
- Integrating multiple SPLDs
- Voice recognition
User Guide
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