

LATTICE LC4064ZC-75TN48C
Manufacturer No:
LC4064ZC-75TN48C
Manufacturer:
Package:
TQFP-48
Description:
EE PLD, 7.5ns, 64-Cell, CMOS, PQFP48, TQFP-48
Quantity:
Delivery:




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In Stock :Available
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LC4064ZC-75TN48C information
LATTICE LC4064ZC-75TN48C technical specifications, attributes, parameters and parts with similar specifications to LATTICE LC4064ZC-75TN48C.
- Type
- Parameter
- Pbfree Code
- Yes
- RoHS Status
- RoHS Compliant
- Part Life Cycle Code
- Active
- Ihs Manufacturer
- LATTICE SEMICONDUCTOR CORP
- Part Package Code
- QFP
- Package Description
- TQFP-48
- Pin Count
- 48
- Reach Compliance Code
- compliant
- ECCN Code
- EAR99
- HTS Code
- 8542.39.00.01
- Samacsys Manufacturer
- Lattice Semiconductor
- Architecture
- PAD-TYPE
- Clock Frequency-Max
- 111 MHz
- In-System Programmable
- YES
- JESD-30 Code
- S-PQFP-G48
- JESD-609 Code
- e3
- JTAG BST
- YES
- Length
- 7 mm
- Moisture Sensitivity Level
- 3
- Number of Dedicated Inputs
- 4
- Number of I/O Lines
- 32
- Number of Inputs
- 36
- Number of Macro Cells
- 64
- Number of Outputs
- 32
- Number of Terminals
- 48
- Operating Temperature-Max
- 90 °C
- Organization
- 4 DEDICATED INPUTS, 32 I/O
- Output Function
- MACROCELL
- Package Body Material
- PLASTIC/EPOXY
- Package Code
- TFQFP
- Package Equivalence Code
- QFP48,.35SQ,20
- Package Shape
- SQUARE
- Package Style
- FLATPACK, THIN PROFILE, FINE PITCH
- Peak Reflow Temperature (Cel)
- 260
- Programmable Logic Type
- EE PLD
- Propagation Delay
- 7.5 ns
- Qualification Status
- Not Qualified
- Seated Height-Max
- 1.2 mm
- Supply Voltage-Max
- 1.9 V
- Supply Voltage-Min
- 1.7 V
- Supply Voltage-Nom
- 1.8 V
- Surface Mount
- YES
- Terminal Finish
- MATTE TIN
- Terminal Form
- GULL WING
- Terminal Pitch
- 0.5 mm
- Terminal Position
- QUAD
- Time@Peak Reflow Temperature-Max (s)
- 40
Download datasheets and manufacturer documentation for LATTICE LC4064ZC-75TN48C.
Datasheets:
LC4064ZC-75TN48C Overview
This network has 64macro cells, which are cells that provide radio coverage provided by a high-power cell site (tower, antenna, mast).You can find it in package 48-LQFP.48 terminations have been programmed into the device.Its terminal position is QUAD.It is powered by a voltage of 1.8V volts.Package the chip by Tray.In order to ensure the reliability of the device, it is designed to operate at a temperature of [0].Chips should be mounted by Surface Mount.In terms of FPGAs, it belongs to the ispMACH® 4000Z series.It has 48 pins programmed.This device can also display YES.Its related parts can be found in the [0].It is recommended that the supply voltage be kept at 1.8Vto maximize efficiency.The electronic component is mounted by Surface Mount.There are 48 pins on the device.In this case, the maximum supply voltage is 1.9V.Despite its minimal supply voltage of 1.7V, it is capable of operating.This logic block consists of 4 logic elements.In this case, 178.57MHz is the frequency that can be achieved.There are 36 logic blocks (LABs) in its basic building block.Input signals are detected by 4 dedicated inputs.
LC4064ZC-75TN48C Features
48-LQFP package
The operating temperature of 0°C~90°C TJ
48 pin count
48 pins
36 logic blocks (LABs)
LC4064ZC-75TN48C Applications
There are a lot of Lattice Semiconductor Corporation
LC4064ZC-75TN48C CPLDs applications.
- Discrete logic functions
- Bootloaders for FPGAs
- Address decoders
- Custom state machines
- Digital systems
- Portable digital devices
- Handheld digital devices
- Battery operated portable devices
- Complex programmable logic devices
- Digital designs
User Guide
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