

LATTICE LC4064V-75T100C
Manufacturer No:
LC4064V-75T100C
Manufacturer:
Package:
TQFP-100
Description:
EE PLD, 7.5ns, 64-Cell, CMOS, PQFP100, TQFP-100
Quantity:
Delivery:




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In Stock :Available
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LC4064V-75T100C information
LATTICE LC4064V-75T100C technical specifications, attributes, parameters and parts with similar specifications to LATTICE LC4064V-75T100C.
- Type
- Parameter
- Pbfree Code
- No
- RoHS Status
- Non-RoHS Compliant
- Part Life Cycle Code
- Obsolete
- Ihs Manufacturer
- LATTICE SEMICONDUCTOR CORP
- Part Package Code
- QFP
- Package Description
- TQFP-100
- Pin Count
- 100
- Reach Compliance Code
- not_compliant
- ECCN Code
- EAR99
- HTS Code
- 8542.39.00.01
- Samacsys Manufacturer
- Lattice Semiconductor
- Architecture
- PAD-TYPE
- Clock Frequency-Max
- 111 MHz
- In-System Programmable
- YES
- JESD-30 Code
- S-PQFP-G100
- JESD-609 Code
- e0
- JTAG BST
- YES
- Length
- 14 mm
- Moisture Sensitivity Level
- 3
- Number of Dedicated Inputs
- 10
- Number of I/O Lines
- 64
- Number of Inputs
- 74
- Number of Macro Cells
- 64
- Number of Outputs
- 64
- Number of Terminals
- 100
- Operating Temperature-Max
- 90 °C
- Organization
- 10 DEDICATED INPUTS, 64 I/O
- Output Function
- MACROCELL
- Package Body Material
- PLASTIC/EPOXY
- Package Code
- LFQFP
- Package Equivalence Code
- QFP100,.63SQ,20
- Package Shape
- SQUARE
- Package Style
- FLATPACK, LOW PROFILE, FINE PITCH
- Peak Reflow Temperature (Cel)
- 240
- Programmable Logic Type
- EE PLD
- Propagation Delay
- 7.5 ns
- Qualification Status
- Not Qualified
- Seated Height-Max
- 1.6 mm
- Supply Voltage-Max
- 3.6 V
- Supply Voltage-Min
- 3 V
- Supply Voltage-Nom
- 3.3 V
- Surface Mount
- YES
- Terminal Finish
- TIN LEAD
- Terminal Form
- GULL WING
- Terminal Pitch
- 0.5 mm
- Terminal Position
- QUAD
- Time@Peak Reflow Temperature-Max (s)
- 30
Download datasheets and manufacturer documentation for LATTICE LC4064V-75T100C.
Datasheets:
LC4064V-75T100C Overview
Currently, there are 64 macro cells, which are low-power cell sites (towers, antennas, masts) that serve as radio coverage.There is a 100-LQFP package containing it.It is recommended that the chip be packaged by Tray.The device operates at a temperature of 0°C~90°C TJ in order to ensure its reliability.Ideally, the chip should be mounted by Surface Mount.The ispMACH® 4000V series FPGA is one of these types.The LC4064 can be used to identify its related parts.Optimal efficiency requires a supply voltage of 3.3V.A Surface Mount is mounted on this electronic component.There are 100 pins on it.There is a maximum supply voltage of 3.6V when the device is operating.Normally, it operates with a voltage of 3VV as its minimum supply voltage.In total, there are 4 logic elements/blocks.There are a total of 388 Programmable I/Os.This can be achieved at a frequency of 178.57MHz.400MHz is the maximum frequency.It is recommended that the operating temperature exceeds 0°C.A temperature lower than 90°C is recommended for operation.The program consists of 4 logic blocks (LABs).In order to form a fundamental building block, there are 4 logic elements or cells.
LC4064V-75T100C Features
100-LQFP package
The operating temperature of 0°C~90°C TJ
100 pins
4 logic blocks (LABs)
LC4064V-75T100C Applications
There are a lot of Lattice Semiconductor Corporation
LC4064V-75T100C CPLDs applications.
- Bootloaders for FPGAs
- Address decoders
- Custom state machines
- Digital systems
- Portable digital devices
- Handheld digital devices
- Battery operated portable devices
- Complex programmable logic devices
- Digital designs
- Field programmable gate
User Guide
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