LATTICE LA4064V-75TN48E

Manufacturer No:

LA4064V-75TN48E

Manufacturer:

LATTICE

Package:

48-TQFP

Description:

0.5mm PMIC LA-ispMACH Series LA4064 48 Pin 168MHz 3.3V 48-TQFP

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Delivery:

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LA4064V-75TN48E information

LATTICE LA4064V-75TN48E technical specifications, attributes, parameters and parts with similar specifications to LATTICE LA4064V-75TN48E.

Type
Parameter

Factory Lead Time
8 Weeks

Mount
Surface Mount

Mounting Type
Surface Mount

Package / Case
48-TQFP

Number of Pins
48

Operating Temperature
-40°C~125°C TA

Packaging
Tray

Series
LA-ispMACH

Published
2000

JESD-609 Code
e3

Pbfree Code
yes

Part Status
Active

Moisture Sensitivity Level (MSL)
3 (168 Hours)

Number of Terminations
48

ECCN Code
EAR99

Terminal Finish
Matte Tin (Sn)

Additional Feature
YES

Subcategory
Programmable Logic Devices

Technology
CMOS

Terminal Position
QUAD

Terminal Form
GULL WING

Peak Reflow Temperature (Cel)
260

Supply Voltage
3.3V

Terminal Pitch
0.5mm

Time@Peak Reflow Temperature-Max (s)
40

Base Part Number
LA4064

Pin Count
48

Qualification Status
Not Qualified

Programmable Type
In System Programmable

Max Supply Voltage
3.6V

Min Supply Voltage
3V

Operating Supply Current
12mA

Number of I/O
32

Nominal Supply Current
12mA

Memory Type
EEPROM

Propagation Delay
7.5 ns

Turn On Delay Time
7.5 ns

Screening Level
AEC-Q100

Number of Logic Blocks (LABs)
4

Output Function
MACROCELL

Number of Macro Cells
64

JTAG BST
YES

Voltage Supply - Internal
3V~3.6V

Length
7mm

Height Seated (Max)
1.2mm

Width
7mm

RoHS Status
RoHS Compliant

Download datasheets and manufacturer documentation for LATTICE LA4064V-75TN48E.

LA4064V-75TN48E Overview

This network has 64macro cells, which are cells that provide radio coverage provided by a high-power cell site (tower, antenna, mast).You can find it in package 48-TQFP.As a result, it has 32 I/O ports programmed.48 terminations have been programmed into the device.Its terminal position is QUAD.It is powered by a voltage of 3.3V volts.This part is part of the family Programmable Logic Devices.Package the chip by Tray.In order to ensure the reliability of the device, it is designed to operate at a temperature of [0].Chips should be mounted by Surface Mount.In terms of FPGAs, it belongs to the LA-ispMACH series.It has 48 pins programmed.This device can also display YES.Its related parts can be found in the [0].It is adopted to store data in EEPROM.The electronic component is mounted by Surface Mount.There are 48 pins on the device.In this case, the maximum supply voltage is 3.6V.Despite its minimal supply voltage of 3V, it is capable of operating.In this case, 168MHz is the frequency that can be achieved.There are 4 logic blocks (LABs) in its basic building block.

LA4064V-75TN48E Features

48-TQFP package
32 I/Os
The operating temperature of -40°C~125°C TA
48 pin count
48 pins
4 logic blocks (LABs)

LA4064V-75TN48E Applications

There are a lot of Lattice Semiconductor Corporation
LA4064V-75TN48E CPLDs applications.

Discrete logic functions
Bootloaders for FPGAs
Address decoders
Custom state machines
Digital systems
Portable digital devices
Handheld digital devices
Battery operated portable devices
Complex programmable logic devices
Digital designs

User Guide

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SHIPPING METHOD

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DELIVERY TIME

1. Once the goods are shipped, estimated delivery time depends on the shipping methods you chose: FedEx International, 5-7 business days.
2. For in-stock parts, orders normally could be shipped out within 1-2days.