Renesas HD6417750SVBT133
Manufacturer No:
HD6417750SVBT133
Manufacturer:
Renesas
Package:
Description:
32-bit Microcontrollers
Quantity:
In Stock :5665
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Shipped from：HK Warehouse
Expected Shipping：Sun, May 31 - Mon, Jun 1, 2026
Lead Time：Inquire about availability
Date Code：Within 2 Years
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PURCHASE
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Quotations are subject to stock availability and may vary with market conditions. Prices and lead times are not guaranteed until a purchase order is confirmed. Ensure your contact details are correct to avoid delays in response.
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SHIPPING COST
1. Shipping starts at $40, but some countries will exceed $40. For example (South Africa, Brazil, India, Pakistan, Israel, etc.).
2. Some specific products need to reach the minimum order quantity.
3. It may cost additional remote fees for delivery if you are in a remote area.
Currently, our products are shipped through DHL, FedEx, SF, and UPS.
DELIVERY TIME1. Once the goods are shipped, estimated delivery time depends on the shipping methods you chose: FedEx International, 5-7 business days.
2. For in-stock parts, orders normally could be shipped out within 1-2days.
HD6417750SVBT133 Information
Renesas HD6417750SVBT133 technical specifications, attributes, parameters and parts with similar specifications to Renesas HD6417750SVBT133.
- Type
- Parameter
- CPU
- SH-4
- Bit Size
- 32
- Program Memory (KB)
- 0
- Data Flash (KB)
- 0
- RAM (KB)
- 0
- Lead Count (#)
- 264
- Supply Voltage (V)
- 3.0 - 3.6
- Operating Freq (Max) (MHz)
- 133
- CAN (ch)
- 0
- I/O Ports
- 28
- Type
- Parameter
- Timer
- 32-bit x 3-ch
- DMA
- Yes
- Ethernet
- No
- RTC
- Yes
- LVD or PVD
- No
- Temp. Range
- -30 to +70°C
- Family Name
- SuperH
- Length (mm)
- 15
- MOQ
- 1
- Pb (Lead) Free
- No
Download datasheets and manufacturer documentation for Renesas HD6417750SVBT133.
The SH7750S is a 32-bit RISC (reduced instruction set computer) microprocessor, featuring object code upward-compatibility with SH-1, SH-2, and SH-3 microcomputers. It includes an instruction cache, an operand cache with a choice of copy-back or write-through mode, and an MMU (memory management unit) with a 64-entry fully-associative unified TLB (translation look aside buffer). The SH7750S has an 8-kbyte instruction cache and a 16-kbyte data cache. & The SH7750S has an on-chip bus state controller (BSC) that allows connection to DRAM and synchronous DRAM. Its 16-bit fixed-length instruction set enables program code size to be reduced by almost 50% compared with 32-bit instructions.
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12.28 M
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