

INTEL EPM7064SLC44-5N
Manufacturer No:
EPM7064SLC44-5N
Manufacturer:
Package:
Description:
5 V 1.27 mm PMIC 44 Pin 250 MHz
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EPM7064SLC44-5N information
INTEL EPM7064SLC44-5N technical specifications, attributes, parameters and parts with similar specifications to INTEL EPM7064SLC44-5N.
- Type
- Parameter
- Mount
- Surface Mount
- Surface Mount
- YES
- Number of Pins
- 44
- Number of Terminals
- 44
- Schedule B
- 8542390000/8542390000, 8542390000/8542390000/8542390000/8542390000/8542390000
- Number of Macrocells
- 64
- Number of I/Os
- 36
- Turn-On Delay Time
- 5 ns
- RoHS Status
- RoHS Compliant
- Package Description
- QCCJ, LDCC44,.7SQ
- Package Style
- CHIP CARRIER
- Moisture Sensitivity Level
- 3
- Package Body Material
- PLASTIC/EPOXY
- Package Equivalence Code
- LDCC44,.7SQ
- Supply Voltage-Nom
- 5 V
- Reflow Temperature-Max (s)
- 40
- Supply Voltage-Min
- 4.75 V
- Operating Temperature-Max
- 70 °C
- RoHS Status
- RoHS Compliant
- Manufacturer Part Number
- EPM7064SLC44-5N
- Clock Frequency-Max
- 250 MHz
- Package Code
- QCCJ
- Package Shape
- SQUARE
- Manufacturer
- Intel Corporation
- Number of I/O Lines
- 36
- Ihs Manufacturer
- INTEL CORP
- Supply Voltage-Max
- 5.25 V
- Risk Rank
- 5.35
- Packaging
- Bulk
- JESD-609 Code
- e3
- ECCN Code
- EAR99
- Terminal Finish
- Matte Tin (Sn)
- Max Operating Temperature
- 70 °C
- Min Operating Temperature
- 0 °C
- Additional Feature
- 64 MACROCELLS; 4 LABS; CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V
- HTS Code
- 8542.39.00.01
- Subcategory
- Programmable Logic Devices
- Technology
- CMOS
- Terminal Position
- QUAD
- Terminal Form
- J BEND
- Peak Reflow Temperature (Cel)
- 245
- Terminal Pitch
- 1.27 mm
- Reach Compliance Code
- compliant
- Frequency
- 250 MHz
- JESD-30 Code
- S-PQCC-J44
- Qualification Status
- Not Qualified
- Power Supplies
- 5 V
Download datasheets and manufacturer documentation for INTEL EPM7064SLC44-5N.
EPM7064SLC44-5N Overview
There are 64 macro cells, which provide radio coverage via high-power cell towers, antennas or masts in a mobile phone network.This electrical part has a terminal position of QUAD and is connected to the ground.It belongs to the family Programmable Logic Devices.Ideally, the chip should be packaged by Bulk.It is also possible to find 64 MACROCELLS; 4 LABS; CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V when using this device.In digital circuits, 1250 gates serve as building blocks.In general, it is recommended to store data in EEPROM.It is mounted by Surface Mount.This board has 44 pins.A maximum supply voltage of 3.6 V is used in its operation.It is powered by 3 V as its minimum supply voltage.Currently, it is powered by 5 V sources.In total, there are 36 programmable I/Os.You can achieve 250 MHz frequencies.It is recommended that the maximal frequency be lower than 175.4 MHz.Operating temperatures should be higher than 0 °C°C.Temperatures should be lower than 70 °C when operating.The system consists of 4 logic blocks (LABs).Basic building blocks have 4 logic elements.There are several types of programmable logic that can be categorized as EE PLD.
EPM7064SLC44-5N Features
44 pins
5 V power supplies
4 logic blocks (LABs)
EPM7064SLC44-5N Applications
There are a lot of ALTERA
EPM7064SLC44-5N CPLDs applications.
- Custom state machines
- Digital systems
- Portable digital devices
- Handheld digital devices
- Battery operated portable devices
- Complex programmable logic devices
- Digital designs
- Field programmable gate
- Address decoding
- D/T registers and latches
User Guide
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