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INTEL EP1810JC-45
Manufacturer No:
EP1810JC-45
Manufacturer:
INTEL
Package:
Description:
5.08mm mm FPGAs 1.27mm mm 68
Quantity:
In Stock :6800
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Shipped from：HK Warehouse
Expected Shipping：Sun, Jun 7 - Mon, Jun 8, 2026
Lead Time：Inquire about availability
Date Code：Within 2 Years
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PURCHASE
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Quotations are subject to stock availability and may vary with market conditions. Prices and lead times are not guaranteed until a purchase order is confirmed. Ensure your contact details are correct to avoid delays in response.
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Step2：Desiccant Protection
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SHIPPING COST
1. Shipping starts at $40, but some countries will exceed $40. For example (South Africa, Brazil, India, Pakistan, Israel, etc.).
2. Some specific products need to reach the minimum order quantity.
3. It may cost additional remote fees for delivery if you are in a remote area.
Currently, our products are shipped through DHL, FedEx, SF, and UPS.
DELIVERY TIME1. Once the goods are shipped, estimated delivery time depends on the shipping methods you chose: FedEx International, 5-7 business days.
2. For in-stock parts, orders normally could be shipped out within 1-2days.
EP1810JC-45 Information
INTEL EP1810JC-45 technical specifications, attributes, parameters and parts with similar specifications to INTEL EP1810JC-45.
- Type
- Parameter
- Surface Mount
- YES
- JESD-609 Code
- e0
- Pbfree Code
- no
- Number of Terminations
- 68
- ECCN Code
- 3A001.A.7
- Terminal Finish
- Tin/Lead (Sn/Pb)
- Additional Feature
- MACROCELLS INTERCONNECTED BY GLOBAL AND/OR LOCAL BUS; 48 MACROCELLS; 4 EXTERNAL CLOCKS
- HTS Code
- 8542.39.00.01
- Subcategory
- Programmable Logic Devices
- Technology
- CMOS
- Type
- Parameter
- Terminal Position
- QUAD
- Terminal Form
- J BEND
- Peak Reflow Temperature (Cel)
- 220
- Supply Voltage
- 5V
- Terminal Pitch
- 1.27mm
- Time@Peak Reflow Temperature-Max (s)
- 30
- Pin Count
- 68
- JESD-30 Code
- S-CQCC-J68
- Qualification Status
- Not Qualified
- Operating Temperature (Max)
- 70°C
Download datasheets and manufacturer documentation for INTEL EP1810JC-45.
EP1810JC-45 Overview
An FPGA of this type is made up of UV PLD gates. The device has 48 I/O ports for more coherent data transfer. In order to operate fpga chips, a voltage supply of 5V volts is required. FPGA parts like this belong to the Programmable Logic Devices family. 68 terminations are present in total. There is a 5V power supply that is required to operate it. With a total of 68 pins, it is equipped with a high level of security. It usually uses a 22.2MHz crystal. Addfpga semiconductorionally, fpga semiconductor has a characteristic called MACROCELLS INTERCONNECTED BY GLOBAL AND/OR LOCAL BUS; 48 MACROCELLS; 4 EXTERNAL CLOCKS that gives fpga semiconductor fpga semiconductors uniqueness. To determine the status of the input signals, 12 dedicated inputs are available in the system. For this FPGA to function properly, the supply voltage must be greater than 4.75V. There are 48 macro cells which make up this CPLD and they serve as the main components of the device. A maximum temperature of 70°C degrees Celsius should not be exceeded during operation.
EP1810JC-45 Features
48 I/Os
EP1810JC-45 Applications
There are a lot of Altera
EP1810JC-45 FPGAs applications.
- Software-defined radio
- Random logic
- ASIC prototyping
- Medical imaging
- Computer hardware emulation
- Integrating multiple SPLDs
- Voice recognition
- Cryptography
- Filtering and communication encoding
- Aerospace and Defense
AIChipLink – Your Trusted Electronic Components Distributor
12.28 M
Listed Part Number
3,000+
Leading Manufacturers
4.9 M
In-stock SKU
15,000+
Warehouse Area(㎡)
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