TI CDCV850DGGRG4
TI CDCV850DGGRG4

TI CDCV850DGGRG4

Manufacturer No:

CDCV850DGGRG4

Manufacturer:

TI

Package:

48-TFSOP (0.240, 6.10mm Width)

Description:

2.5V PLL Clock Driver CDCV850 Clock Generators 48 Pins 48-TFSOP (0.240, 6.10mm Width) 48 Terminals Surface Mount 2.3V~2.7V Tape & Reel (TR)

Delivery:

DHL
DHL
DHL
DHL

Payment:

DHL
DHL
DHL
DHL
DHL
DHL
DHL

In Stock :Available

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CDCV850DGGRG4 information

TI CDCV850DGGRG4 technical specifications, attributes, parameters and parts with similar specifications to TI CDCV850DGGRG4.

  • Type
  • Parameter
  • Lifecycle Status
  • OBSOLETE (Last Updated: 2 months ago)
  • Contact Plating
  • Gold
  • Mount
  • Surface Mount
  • Mounting Type
  • Surface Mount
  • Package / Case
  • 48-TFSOP (0.240, 6.10mm Width)
  • Number of Pins
  • 48
  • Weight
  • 223.195796mg
  • Operating Temperature
  • 0°C~85°C
  • Packaging
  • Tape & Reel (TR)
  • JESD-609 Code
  • e4
  • Part Status
  • Obsolete
  • Moisture Sensitivity Level (MSL)
  • 2 (1 Year)
  • Number of Terminations
  • 48
  • Type
  • PLL Clock Driver
  • Subcategory
  • Clock Drivers
  • Packing Method
  • TR
  • Technology
  • CMOS
  • Voltage - Supply
  • 2.3V~2.7V
  • Terminal Position
  • DUAL
  • Terminal Form
  • GULL WING
  • Peak Reflow Temperature (Cel)
  • 260
  • Number of Functions
  • 1
  • Supply Voltage
  • 2.5V
  • Terminal Pitch
  • 0.5mm
  • Base Part Number
  • CDCV850
  • Output
  • SSTL-2
  • Pin Count
  • 48
  • Number of Outputs
  • 10
  • Operating Supply Voltage
  • 2.5V
  • Supply Voltage-Max (Vsup)
  • 2.7V
  • Power Supplies
  • 2.52.5/3.3V
  • Supply Voltage-Min (Vsup)
  • 2.3V
  • Number of Circuits
  • 1
  • Nominal Supply Current
  • 6mA
  • Family
  • 850
  • Input
  • LVTTL, SSTL-2
  • Ratio - Input:Output
  • 1:11
  • PLL
  • Yes with Bypass
  • Differential - Input:Output
  • Yes/Yes
  • Propagation Delay (tpd)
  • 4 ns
  • Divider/Multiplier
  • No/No
  • Same Edge Skew-Max (tskwd)
  • 0.075 ns
  • Height
  • 1.2mm
  • Length
  • 12.5mm
  • Width
  • 6.1mm
  • Thickness
  • 1.15mm
  • Radiation Hardening
  • No

Download datasheets and manufacturer documentation for TI CDCV850DGGRG4.

CDCV850DGGRG4 Overview


Clock generator is packaged in the way of Tape & Reel (TR). Clock PLL is embedded in the 48-TFSOP (0.240, 6.10mm Width) package. The peak reflow temperature (Cel) amounts to 260 to be essentially indestructible. 48 terminations can be found in frequency generators. The supply voltage of 2.5V allows for high efficiency. LVTTL, SSTL-2 is designed for clock generator's input. 1 circuits are used to achieve clock PLL's superior flexibility. PLL clock is mounted in the way of Surface Mount. The maximal supply voltage (Vsup) reaches 2.7V. The supply voltage (Vsup) should be kept above 2.3V for normal operation. Clock generators should operate with the voltage supply of 2.3V~2.7V. The temperature should be set at 0°C~85°C to ensure reliable performance. SSTL-2 is designed for clock generator's output. This electronic component can be classified into PLL Clock Driver. Clock PLL is equipped with 48 pin count. According to the base part number, its related parts can be founded. Clock generator is designed with 48 pins. The supply voltage should be maintained at 2.5V for high efficiency. Clock generator can also be included into Clock Drivers. Clock PLL is configured with 10 output. The maximal same edge skew (tskwd) can not be exceeded. This clock generator belongs to the family of 850. It is able to realize high efficiency when operating at a frequency of 140MHz. Phase locked loop is well suited for TR based on PLL's reliable performance.

CDCV850DGGRG4 Features


Available in the 48-TFSOP (0.240, 6.10mm Width)
Supply voltage of 2.5V
Operating supply voltage of 2.5V


CDCV850DGGRG4 Applications


There are a lot of Texas Instruments
CDCV850DGGRG4 Clock Generators applications.


  • Wireless infrastructure
  • Instrument
  • Automatic test equipment
  • Wide area power system
  • Digital circuits
  • Wireless base station for LTE, LTE-advanced
  • Picocells, femtocells and small cells
  • Sampling clocks for ADC and DAC
  • 1 Gigabit Ethernet
  • 10 Gigabit Ethernet

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Step1:Prepare product

Step1:Prepare product

Step2:Desiccant Protection

Step2:Desiccant Protection

Step3:Vacuum Packaging

Step3:Vacuum Packaging

Step4:Individual Package

Step4:Individual Package

Step5:Anti-collision Filling

Step5:Anti-collision Filling

Step6:Packaging Box

Step6:Packaging Box

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DELIVERY TIME

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