Renesas CD4023BKMSR
Manufacturer No:
CD4023BKMSR
Manufacturer:
Renesas
Package:
Description:
CMOS NAND Gate
Quantity:
In Stock :2952
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Shipped from：HK Warehouse
Expected Shipping：Fri, May 29 - Sat, May 30, 2026
Lead Time：Inquire about availability
Date Code：Within 2 Years
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DELIVERY TIME1. Once the goods are shipped, estimated delivery time depends on the shipping methods you chose: FedEx International, 5-7 business days.
2. For in-stock parts, orders normally could be shipped out within 1-2days.
CD4023BKMSR Information
Renesas CD4023BKMSR technical specifications, attributes, parameters and parts with similar specifications to Renesas CD4023BKMSR.
- Type
- Parameter
- Pkg. Type
- CFP
- Lead Count (#)
- 14
- Carrier Type
- Tray
- Moisture Sensitivity Level (MSL)
- Not Applicable
- Pitch (mm)
- 1.3
- Pkg. Dimensions (mm)
- 9.8 x 6.5 x 0.00
- DLA SMD
- 5962R9662103VXC
- Pb (Lead) Free
- Exempt
- Pb Free Category
- Gold Plate over compliant Undercoat-e4
- MOQ
- 25
- Type
- Parameter
- Temp. Range
- -55 to +125°C
- DSEE (MeV·cm2/mg)
- 75
- Length (mm)
- 9.8
- Qualification Level
- QML Class V (space)
- Rating
- Space
- TID HDR (krad(Si))
- 100
- TID LDR (krad(Si))
- ELDRS free
- Thickness (mm)
- 0
- Width (mm)
- 6.5
- Moisture Sensitivity Level (MSL)
- Not Applicable
Download datasheets and manufacturer documentation for Renesas CD4023BKMSR.
The CD4023BMS is a triple 3-input CMOS NAND gate that provides the system designer with direct implementation of the NAND function and supplements the existing family of CMOS gates. All inputs and outputs are buffered. The CD4023BMS is supplied in these 14-lead outline packages: Braze Seal DIP H4Q, Frit Seal DIP H1B and a Ceramic Flatpack H3W.
- High-voltage types (20V rating)
- Propagation delay time = 60ns (typ.) at CL = 50pF, VDD = 10V
- Buffered inputs and outputs
- Standardized symmetrical output characteristics
- Maximum input current of 1µA at 18V over full package temperature range; 100nA at 18V and +25 °C
- 100% tested for maximum quiescent current at 20V
- 5V, 10V and 15V parametric ratings
- Noise margin (over full package temperature range):
- 1V at VDD = 5V
- 2V at VDD = 10V
- 2.5V at VDD = 15V
- Meets all requirements of JEDEC tentative standards No. 13B, "Standard Specifications for Description of "B" Series CMOS devices
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12.28 M
Listed Part Number
3,000+
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In-stock SKU
15,000+
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