Renesas CD4015BDMSR
Manufacturer No:
CD4015BDMSR
Manufacturer:
Renesas
Package:
Description:
CMOS Dual 4-Stage Static Shift Register With Serial Input/Parallel Output
Quantity:
In Stock :1277
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Shipped from：HK Warehouse
Expected Shipping：Fri, May 29 - Sat, May 30, 2026
Lead Time：Inquire about availability
Date Code：Within 2 Years
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DELIVERY TIME1. Once the goods are shipped, estimated delivery time depends on the shipping methods you chose: FedEx International, 5-7 business days.
2. For in-stock parts, orders normally could be shipped out within 1-2days.
CD4015BDMSR Information
Renesas CD4015BDMSR technical specifications, attributes, parameters and parts with similar specifications to Renesas CD4015BDMSR.
- Type
- Parameter
- Pkg. Type
- SBDIP
- Lead Count (#)
- 16
- Carrier Type
- Tube
- Moisture Sensitivity Level (MSL)
- Not Applicable
- Pitch (mm)
- 2.5
- Pkg. Dimensions (mm)
- 20.3 x 7.5 x 2.41
- DLA SMD
- 5962R9662401VEC
- Pb (Lead) Free
- Exempt
- Pb Free Category
- Gold Plate over compliant Undercoat-e4
- MOQ
- 25
- Type
- Parameter
- Temp. Range
- -55 to +125°C
- DSEE (MeV·cm2/mg)
- 75
- Length (mm)
- 20.3
- Qualification Level
- QML Class V (space)
- Rating
- Space
- TID HDR (krad(Si))
- 100
- TID LDR (krad(Si))
- ELDRS free
- Thickness (mm)
- 2.41
- Width (mm)
- 7.5
- Moisture Sensitivity Level (MSL)
- Not Applicable
Download datasheets and manufacturer documentation for Renesas CD4015BDMSR.
CD4015BMS consists of two identical, independent, 4-stage serial-input/parallel output registers. Each register has independent CLOCK and RESET inputs as well as a single serial DATA input. Q outputs are available from each of the four stages on both registers. All register stages are D type, master-slave flip-flops. The logic level present at the DATA input is transferred into the first register stage and shifted over one stage at each positive-going clock transition. Resetting of all stages is accomplished by a high level on the reset line. Register expansion to 8 stages using one CD4015BMS package, or to more than 8 stages using additional CD4015BMS's is possible. The CD4015BMS is supplied in these 16 lead outline packages: Braze Seal DIP H4X Frit Seal DIP H1F Ceramic Flatpack H6W
- High voltage type (20V rating)
- Medium speed operation 12MHz (typ.) clock rate at VDD - VSS = 10V
- Fully static operation
- 8 master-slave flip-flops plus input and output buffering
- 100% tested for quiescent current at 20V
- 5V, 10V and 15V parametric ratings
- Standardized symmetrical output characteristics
- Maximum input current of 1µA at 18V over full package - temperature range; 100nA at 18V and 25 °C
- Noise margin (full package - temperature range) = 1V at VDD = 5V, 2V at VDD = 10V, 2.5V at VDD = 15V
- Meets all requirements of JEDEC tentative standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices"
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12.28 M
Listed Part Number
3,000+
Leading Manufacturers
4.9 M
In-stock SKU
15,000+
Warehouse Area(㎡)
