Microchip ATSAMG54N19B-AU

The Microchip's SAM G54 embeds a Cortex-M4 CPU with an FPU (floating point unit) that ensures maximum throughput. This is very important as it allows you to minimize the active power consumption and get to sleep faster in order to reduce the overall power consumption. Additionally, the device has 16 DMA channels, which give extremely high throughput.

The combination of ultra-low power consumption, fast wake-up time and high throughput is what gives the SAM G the edge in space- and power-constrained consumer applications such as sensor hubs. It wakes up quickly, has the throughput needed to reduce the amount of time spent in active mode, and then goes back to sleep with SRAM retention to conserve energy.

This gives the best performance and longest battery lifetime. It is fully-functional all the way down to 1.7V; including flash reads and writes, as well as full ADC operation. This allows for a more flexible power supply scheme that will squeeze extra runtime out of a battery.

Supported by MPLAB X IDE and MPLAB Harmony.

• ARM Cortex-M4 with up to 96 Kbytes SRAM on I/D bus providing 0 wait state execution at up to 96 MHz
• Memory Protection Unit (MPU)
• DSP Instructions, Floating Point Unit (FPU), Thumb®-2 instruction set
• 512 Kbytes embedded Flash
• 96 Kbytes embedded SRAM            
• Embedded voltage regulator for single-supply operation
• Power-on reset (POR) and Watchdog for safe operation
• Quartz or ceramic resonator oscillators: 3 to 20 MHz with clock failure detection and 32.768 kHz for RTT or system clock
• High-precision 8/16/24 MHz factory-trimmed internal RC oscillator. In-application trimming access for frequency adjustment
• Slow clock internal RC oscillator as permanent low-power mode device clock
• PLL range from 48 MHz to 120 MHz for device clock
• PLL range from 24 MHz to 48 MHz for USB device and USB OHCI
• Up to 30 peripheral DMA (PDC) channels
• 256-bit General-Purpose Backup Registers (GPBR) 16 external interrupt lines
• 102 μA/MHz running Fibonacci in SRAM(Active mode)
• Wait mode down to 8 μA
• Wake-up time less than 5 μs
• 49-lead WLCSP, 100-pin LQFP, 14 x 14 mm, pitch 0.5 mm
• Industrial (-40° C to +85° C)
• One USART with SPI mode
• 2 Inter-IC Sound Controllers (I2S)
• Two UARTs
• Three Two-Wire Interface (TWI) modules featuring two TWI masters and one high-speed TWI slave
• One fast SPI at up to 24Mbit/s
• Two three-channel 16-bit Timer/Counters (TC) with Capture, Waveform, Compare and PWM modes
• One 32-bit Real-Time Timer (RTT)
• One 32-bit Real-Time Clock (RTC)
• Up to 38 controllable I/O lines with external interrupt capability (edge or level sensitivity), debouncing, glitch filtering and on-die series resistor termination. Individually programmable open-drain, pull-up and pull-down resistor and synchronous output
• Two PIO Controllers provide control of up to 25 I/O lines
• Two-way one-channel Pulse Density Modulation (PDM) (interfaces up to two microphones in PDM mode)
• One 8-channel ADC, resolution up to 12 bits, sampling rate up to 800 kSps
• Serial Wire/JTAG Debug Port(SWJ-DP)
• Debug access to all memories and registers in the system, including Cortex-M4 register bank when the core is running, halted, or held in reset.
• Serial Wire Debug Port (SW-DP) and Serial Wire JTAG Debug Port (SWJ-DP) debug access.
• Flash Patch and Breakpoint (FPB) unit for implementing breakpoints and code patches.
• Data Watchpoint and Trace (DWT) unit for implementing watchpoints, data tracing, and system profiling.
• Instrumentation Trace Macrocell (ITM) for support of printf style debugging.
• IEEE1149.1 JTAG Boundary-scan on all digital pins.
• ASF-Atmel software Framework – SAM software development framework
• Integrated in the Atmel Studio IDE with a graphical user interface or available as standalone for GCC, IAR compilers.
• DMA support, Interrupt handlers Driver support
• USB, TCP/IP, Wi-Fi and Bluetooth, Numerous USB classes, DHCP and Wi-Fi encryption Stacks
• RTOS integration, FreeRTOS is a core component