Microchip ATSAME51G19A-MU-EFP

The SAM E51 high performance micro-controller series is targeted for general purpose applications using the 32-bit ARM® Cortex®-M4 processor with Floating Point Unit (FPU), running up to 120 MHz ,up to 1 MB Dual Panel Flash with ECC, CAN-FD and up to 256 KB of SRAM with ECC .

Series offers excellent features with class leading power performance ideal for multiple market segments.

Key features

·        Quad Serial Peripheral Interface(QSPI) with Execute in Place (XIP) Support.

·        Up to 2 Secure Digital Host Controller (SDHC)

·        Inter-IC Sound(I2S)Controller for Audio

·        Peripheral Touch Controller (PTC) supporting up to 256 channels of capacitive touch .

·        Full speed USB with embedded Host/device.

·        Supports 5 Low power modes with class leading 65µA/MHz Active Power Performance.

·        Integrated security including Asymmetric and Symmetric Crypto hardware acceleration

·        Serial communication (SERCOM) ports configurable as UART/USART, ISO 7816, SPI or I²C 

·     CAN-FD

Supported by MPLAB X IDE and MPLAB Harmony.

Functional Safety

This device supports the ISO 26262 (ASIL B) functional safety standard.  

·   The Functional Safety Manual, FMEDA and information on the Diagnostic Software are available under NDA through the request form on the 32-bit Microcontrollers Functional Safety web page.

·  Learn more about 32-bit MCUs with Functional Safety capabilities including device hardware and certified software libraries. 

Processor
• ARM Cortex-M4F CPU running at up to 120 MHz
• Floating Point Unit (FPU)
• Embedded Trace Module (ETM) with instruction trace stream
• Core Sight Embedded Trace Buffer (ETB)
• 512 KB in-system self-programmable Flash with:Error Correction Code (ECC) Dual bank with Read-While-Write (RWW) support EEPROM hardware emulation
• Error Correction Code (ECC)
• Dual bank with Read-While-Write (RWW) support
• EEPROM hardware emulation
• 192 KB SRAM Main Memory Error Correction Code (ECC) RAM option
• Error Correction Code (ECC) RAM option
• Up to 4 KB of Tightly Coupled Memory (TCM)
• Up to 8 KB additional SRAM with backup retention capability
• Five Low Power Modes (Idle, Standby, Hibernate, Backup, and Off )
• Sleep Walking peripherals.
• Battery backup support
• Embedded Buck/LDO regulator supporting on-the-fly selection.
• 65µA/MHz active power consumption.
• CAN-FD
• One Advanced Encryption System (AES) with 256-bit key length and up to 2 MB/s data rate Five confidential modes of operation (ECB, CBC, CFB, OFB, CTR)
• Five confidential modes of operation (ECB, CBC, CFB, OFB, CTR)
• True Random Number Generator (TRNG)
• Public Key Cryptography Controller (PUKCC) and associated Classical Public Key Cryptography Library (PUKCL) RSA, DSA Elliptic Curves Cryptography (ECC) ECC GF(2n), ECC GF(p) Integrity Check Module (ICM) based on Secure Hash Algorithm (SHA1, SHA224, SHA256), DMA
• RSA, DSA
• Elliptic Curves Cryptography (ECC) ECC GF(2n), ECC GF(p)
• Integrity Check Module (ICM) based on Secure Hash Algorithm (SHA1, SHA224, SHA256), DMA
• 32-channel Direct Memory Access Controller (DMAC)
• One SD(HC) Memory Card Interfaces (SDHC) Compatibility with SD and SDHC Memory Card Specification Version 3.01 Compatibility with SDIO Specification Version 3.0 Compliant with JDEC specification, MMC memory cards V4.51
• Compatibility with SD and SDHC Memory Card Specification Version 3.01
• Compatibility with SDIO Specification Version 3.0
• Compliant with JDEC specification, MMC memory cards V4.51
• One Quad I/O Serial Peripheral Interface (QSPI) eXecute-In-Place (XIP) support Up to 75 MHz SDR operation and DDR support
• eXecute-In-Place (XIP) support
• Up to 75 MHz SDR operation and DDR support
• One Full-Speed (12 Mbps) Universal Serial Bus (USB) 2.0 interface Embedded host and device function
• Embedded host and device function
• Six Serial Communication Interfaces (SERCOM), each configurable to operate as either: USART with full-duplex and single-wire half-duplex configuration ISO7816 I2C up to 3.4MHz SPI LIN master/slave RS485 SPI inter-byte space
• USART with full-duplex and single-wire half-duplex configuration
• ISO7816
• I2C up to 3.4MHz
• SPI
• LIN master/slave
• RS485
• SPI inter-byte space
• One two-channel Inter-IC Sound Interface (I2S)
• Parallel Capture Controller (PCC) Up to 14-bit parallel capture mode
• Up to 14-bit parallel capture mode
• Peripheral Touch Controller (PTC) Up to 256 channel capacitive touch and proximity sensing
• Up to 256 channel capacitive touch and proximity sensing
• 32-channel Event System
• Up to four 16-bit Timers/Counters (TC) each configurable as: 16-bit ,32-bit or 8-bit TC with two compare/capture channels
• 16-bit ,32-bit or 8-bit TC with two compare/capture channels
• Two 24-bit Timer/Counters for Control (TCC), with extended functions:
• 32-bit Real Time Counter (RTC) with clock/calendar function Up to 5 wake-up pins with tamper detection and de-bouncing filter
• Up to 5 wake-up pins with tamper detection and de-bouncing filter
• Watchdog Timer (WDT) with Window mode
• CRC-32 generator
• Position Decoder (PDEC)
• Frequency meter (FREQM)
• One Configurable Custom Logic (CCL)
• Dual 12-bit, 1 MSPS Analog-to-Digital Converter (ADC) with up to 16 channels each Differential and single-ended input Automatic offset and gain error compensation Oversampling and decimation in hardware to support 13-, 14-, 15-, or 16-bit resolution
• Differential and single-ended input
• Automatic offset and gain error compensation
• Oversampling and decimation in hardware to support 13-, 14-, 15-, or 16-bit resolution
• Dual 12-bit, 1 MSPS Output Digital-to-Analog Converter (DAC)
• Two Analog Comparators (AC) with Window Compare function
• One temperature sensor
• Power-on Reset (POR) and Brown-out detection (BOD)
• Internal and external clock options
• External Interrupt Controller (EIC)
• 37 programmable I/O pins
• 1.71V – 3.6V
• 48-pin QFN