Microchip ATSAM3N1CB-AU

The Microchip's SAM3N1C is a member of the SAM3N series of microcontrollers based on the high-performance 32-bit ARM® Cortex®-M3 RISC processor.

It operates at a maximum speed of 48MHz and features 64KB of flash memory and 8KB of SRAM. The peripheral set includes a USART, two UARTs, two SPIs, two TWIs (I²C), PWM timer, six 16-bit timers, RTC, a 10-bit ADC, and a 10-bit DAC.

The SAM3N1C is ready for capacitive touch thanks to the Microchip QTouch library, offering an easy way to implement buttons, wheels, and sliders.

It operates from 1.62V to 3.6V and is available in 100-pin QFP and BGA packages. The SAM3N1C is pin-to-pin compatible with the SAM3S1C.

Pin-to-pin compatible with SAM7S legacy products (48/64-pin versions) and SAM3S (48/64/100-pin versions)

• ARM Cortex-M3 revision 2.0 running at up to 48 MHz
• Memory Protection Unit (MPU)
• 24-bit SysTick Counter
• Nested Vector Interrupt Controller
• DSP Instructions, Thumb®-2 instruction set
• 64 Kbytes embedded Flash, 128-bit wide access, memory accelerator, single plane
• 8 Kbytes embedded SRAM
• 16 Kbytes ROM with embedded boot loader routines (UART, USB) and IAP routines
• Embedded voltage regulator for single-supply operation
• Power-on-Reset (POR), Brown-out Detector (BOD) and Dual Watchdog for Safe Operation
• Quartz or ceramic resonator oscillators: 3 to 20 MHz with clock failure detection and 32.768 kHz for RTT or system clock
• Slow clock internal RC oscillator as permanent low-power mode device clock
• High-precision 8/12 MHz factory-trimmed internal RC oscillator with 4 MHz default frequency for device startup, in-application trimming access for frequency adjustment
• One PLL up to 130 MHz for device clock
• Up to 10 Peripheral DMA (PDC) channels
• Sleep, Wait, and Backup modes, down to 1.2 μA in Backup mode with RTC, RTT, and 256-bit GPBR
• 100-lead LQFP, 14 x 14 mm, pitch 0.5 mm
• 100-ball TFBGA, 9 x 9 mm, pitch 0.8 mm
• Industrial (-40° C to +85° C)
• Up to 2 USARTs with RS-485 and SPI mode support. One USART (USART0) has ISO7816, IrDA® and PDC support in addition
• Two 2-wire UARTs
• Two 2-wire Interfaces (I2C compatible)
• One SPI
• Up to two 3-channel 16-bit Timer Counters with capture, waveform, compare and PWM mode, Quadrature Decoder Logic and 2-bit Gray Up/Down Counter for Stepper Motor
• 4-channel 16-bit PWM
• 32-bit low-power Real-time Timer (RTT)
• Low-power Real-time Clock (RTC) with calendar and alarm features
• 79 I/O lines with external interrupt capability (edge or level sensitivity), debouncing, glitch filtering and on-die Series Resistor Termination
• Three 32-bit Parallel Input/Output Controllers
• 16 channels, 384 ksps 10-bit ADC
• One 500 ksps 10-bit DAC
• Serial Wire/JTAG Debug Port(SWJ-DP)
• Debug access to all memories and registers in the system, including Cortex-M4 register bank when the core is running, halted, or held in reset.
• Serial Wire Debug Port (SW-DP) and Serial Wire JTAG Debug Port (SWJ-DP) debug access.
• Flash Patch and Breakpoint (FPB) unit for implementing breakpoints and code patches.
• Data Watchpoint and Trace (DWT) unit for implementing watchpoints, data tracing, and system profiling.
• Instrumentation Trace Macrocell (ITM) for support of printf style debugging.
• IEEE1149.1 JTAG Boundary-scan on all digital pins.
• ASF-Atmel software Framework – SAM software development framework
• Integrated in the Atmel Studio IDE with a graphical user interface or available as standalone for GCC, IAR compilers.
• DMA support, Interrupt handlers Driver support
• USB, TCP/IP, Wi-Fi and Bluetooth, Numerous USB classes, DHCP and Wi-Fi encryption Stacks
• RTOS integration, FreeRTOS is a core component