Renesas 9QXL2001CNHGK
Manufacturer No:
9QXL2001CNHGK
Manufacturer:
Renesas
Package:
Description:
GQFN-80(6x6) Application Specific Clock/Timing ROHS
Quantity:
In Stock :7472
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Shipped from：HK Warehouse
Expected Shipping：Thu, May 28 - Fri, May 29, 2026
Lead Time：Inquire about availability
Date Code：Within 2 Years
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Step2：Desiccant Protection
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SHIPPING COST
1. Shipping starts at $40, but some countries will exceed $40. For example (South Africa, Brazil, India, Pakistan, Israel, etc.).
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DELIVERY TIME1. Once the goods are shipped, estimated delivery time depends on the shipping methods you chose: FedEx International, 5-7 business days.
2. For in-stock parts, orders normally could be shipped out within 1-2days.
9QXL2001CNHGK Information
Renesas 9QXL2001CNHGK technical specifications, attributes, parameters and parts with similar specifications to Renesas 9QXL2001CNHGK.
- Type
- Parameter
- Lead Count (#)
- 80
- Carrier Type
- Tray
- Moisture Sensitivity Level (MSL)
- 3
- Qty. per Reel (#)
- 0
- Qty. per Carrier (#)
- 490
- Pb (Lead) Free
- Yes
- Pb Free Category
- e4 NiPdAu
- Temp. Range
- -40 to 105°C
- Country of Assembly
- Taiwan
- Country of Wafer Fabrication
- China, Taiwan
- Type
- Parameter
- Price (USD) | 1ku
- 3.4742
- Accepts Spread Spec Input
- Yes
- Advanced Features
- Multiple SMBus addresses, Side Band interface
- App Jitter Compliance
- 25G EDR, IF-UPI, PCIe Gen1, PCIe Gen2, PCIe Gen3, PCIe Gen4, PCIe Gen5, DB2000Q, QPI, UPI, PCIe Gen6
- Architecture
- Common, SRIS, SRNS
- C-C Jitter Max P-P (ps)
- 50
- Clock Spec.
- Enhanced DB2000QL
- Core Voltage (V)
- 3.3
- Diff. Input Signaling
- HCSL
- Diff. Inputs
- 1
Download datasheets and manufacturer documentation for Renesas 9QXL2001CNHGK.
The 9QXL2001C is a 20-output very-low additive phase jitter fanout buffer for PCIe Gen1 to Gen6 applications. The 9QXL2001C provides two methods to control output enables; standard OE# pins and SMBus enable bits, and a simple 3-wire serial interface (side-band interface) that is independent of the SMBus. The side-band interface is enabled via a hardware strap and operates simultaneously with the OE# pins and SMBus enable bits. It offers integrated terminations for 85Ω transmission lines.
- 8 OE# pins provide hardware control of 8 outputs
- 20 SMBus bits allow software control of each output
- 3-wire side-band interface provides serial control of all 20 outputs at a 25MHz rate
- Outputs remain Low/Low when powered up with a floating input clock
- Low-Power HCSL (LP-HCSL) outputs reduce device power consumption by 50%
- Zo = 85Ω outputs eliminate 80 resistors, saving 130mm2 of area
- 9 selectable SMBus addresses
- Spread spectrum compatible
- 6mm × 6mm dual-row 80-GQFN
AIChipLink – Your Trusted Electronic Components Distributor
12.28 M
Listed Part Number
3,000+
Leading Manufacturers
4.9 M
In-stock SKU
15,000+
Warehouse Area(㎡)
