Renesas 9DBU0231AKLFT
Manufacturer No:
9DBU0231AKLFT
Manufacturer:
Renesas
Package:
Description:
VFQFPN-24(4x4) Application Specific Clock/Timing ROHS
Quantity:
In Stock :7618
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Shipped from：HK Warehouse
Expected Shipping：Sat, May 30 - Sun, May 31, 2026
Lead Time：Inquire about availability
Date Code：Within 2 Years
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PURCHASE
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Step2：Desiccant Protection
Step3：Vacuum Packaging
Step4：Individual Package
Step5：Anti-collision Filling
Step6：Packaging Box
SHIPPING COST
1. Shipping starts at $40, but some countries will exceed $40. For example (South Africa, Brazil, India, Pakistan, Israel, etc.).
2. Some specific products need to reach the minimum order quantity.
3. It may cost additional remote fees for delivery if you are in a remote area.
Currently, our products are shipped through DHL, FedEx, SF, and UPS.
DELIVERY TIME1. Once the goods are shipped, estimated delivery time depends on the shipping methods you chose: FedEx International, 5-7 business days.
2. For in-stock parts, orders normally could be shipped out within 1-2days.
9DBU0231AKLFT Information
Renesas 9DBU0231AKLFT technical specifications, attributes, parameters and parts with similar specifications to Renesas 9DBU0231AKLFT.
- Type
- Parameter
- Lead Count (#)
- 24
- Carrier Type
- Reel
- Moisture Sensitivity Level (MSL)
- 1
- Qty. per Reel (#)
- 2500
- Qty. per Carrier (#)
- 0
- Pb (Lead) Free
- Yes
- Pb Free Category
- e3 Sn
- Temp. Range
- 0 to 70°C
- Country of Assembly
- Malaysia
- Country of Wafer Fabrication
- Taiwan
- Type
- Parameter
- Accepts Spread Spec Input
- Yes
- Additive Phase Jitter Typ RMS (fs)
- 313
- Additive Phase Jitter Typ RMS (ps)
- 0.31
- Advanced Features
- Multiple SMBus addresses
- App Jitter Compliance
- PCIe Gen1, PCIe Gen2, PCIe Gen3
- Architecture
- Common, SRNS
- C-C Jitter Max P-P (ps)
- 50
- Core Voltage (V)
- 1.5
- Diff. Input Signaling
- HCSL
- Diff. Inputs
- 1
Download datasheets and manufacturer documentation for Renesas 9DBU0231AKLFT.
Datasheet:
The 9DBU0231 is a member of IDT's 1.5 V Ultra-Low-Power (ULP) PCIe family. The device has 2 output enables for clock management.
- LP-HCSL outputs; save 4 resistors compared to standard HCSL outputs.
- 35 mW typical power consumption in PLL mode; minimal power consumption
- OE# pins; support DIF power management
- HCSL-compatible differential input; can be driven by common clock sources
- LP-HCSL differential clock outputs; reduced power and board space
- Programmable slew rate for each output; allows tuning for various line lengths
- Programmable output amplitude; allows tuning for various application environments
- Pin/software selectable PLL bandwidth and PLL Bypass; minimize phase jitter for each application
- Outputs blocked until PLL is locked; clean system start-up
- Configuration can be accomplished with strapping pins; SMBus interface not required for device control.
- 3.3 V tolerant SMBus interface works with legacy controllers
- Space-saving 4x4 mm 24-pin VFQFPN; minimal board space
AIChipLink – Your Trusted Electronic Components Distributor
12.28 M
Listed Part Number
3,000+
Leading Manufacturers
4.9 M
In-stock SKU
15,000+
Warehouse Area(㎡)
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