Renesas 8R9306NLGI
Manufacturer No:
8R9306NLGI
Manufacturer:
Renesas
Package:
Description:
2.5V LVDS, 1:6 Clock Buffer Terabuffer II
Quantity:
In Stock :1206
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Shipped from：HK Warehouse
Expected Shipping：Fri, May 29 - Sat, May 30, 2026
Lead Time：Inquire about availability
Date Code：Within 2 Years
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DELIVERY TIME1. Once the goods are shipped, estimated delivery time depends on the shipping methods you chose: FedEx International, 5-7 business days.
2. For in-stock parts, orders normally could be shipped out within 1-2days.
8R9306NLGI Information
Renesas 8R9306NLGI technical specifications, attributes, parameters and parts with similar specifications to Renesas 8R9306NLGI.
- Type
- Parameter
- Lead Count (#)
- 28
- Carrier Type
- Tray
- Moisture Sensitivity Level (MSL)
- 3
- Qty. per Reel (#)
- 0
- Qty. per Carrier (#)
- 490
- Pb (Lead) Free
- Yes
- Pb Free Category
- e3 Sn
- Temp. Range
- -40 to +85°C
- Additive Phase Jitter Typ RMS (fs)
- 159
- Additive Phase Jitter Typ RMS (ps)
- 0.159
- Type
- Parameter
- Core Voltage (V)
- 2.5
- Function
- Buffer, Multiplexer
- Input Freq (MHz)
- 0 - 1000
- Input Type
- CML, HSTL, LVDS, LVCMOS, LVPECL
- Inputs (#)
- 2
- Length (mm)
- 6
- MOQ
- 490
- Output Banks (#)
- 1
- Output Freq Range (MHz)
- 0 - 1000
- Output Skew (ps)
- 40
Download datasheets and manufacturer documentation for Renesas 8R9306NLGI.
The 8R9306I 2.5V differential clock buffer is a user-selectable differential input to six LVDS outputs. The fanout from a differential input to six LVDS outputs reduces loading on the preceding driver and provides an efficient clock distribution network. The 8R9306I can act as a translator from a differential HSTL, eHSTL, LVPECL (2.5V), LVPECL (3.3V), CML, or LVDS input to LVDS outputs. A single-ended 3.3V, 2.5V LVTTL input can also be used to translate to LVDS outputs. The redundant input capability allows for an asynchronous change-over from a primary clock source to a secondary clock source. Selectable reference inputs are controlled by SEL. The 8R9306I outputs can be asynchronously enabled/disabled. When disabled, the outputs will drive to the value selected by the GL pin. Multiple power and grounds reduce noise.
- Guaranteed low skew: 40ps (maximum)
- Very low duty cycle distortion: < 125ps (maximum)
- High speed propagation delay: < 1.75ns (maximum)
- Up to 1GHz operation
- Selectable inputs
- Hot insertable and overvoltage tolerant inputs
- 3.3V/2.5V LVTTL, HSTL eHSTL, LVPECL (2.5V), LVPECL (3.3V), CML or LVDS input interface
- Selectable differential inputs to six LVDS outputs
- Power-down mode
- 2.5V VDD
- -40 °C to 85 °C ambient operating temperature
- Available in a VFQFPN package
AIChipLink – Your Trusted Electronic Components Distributor
12.28 M
Listed Part Number
3,000+
Leading Manufacturers
4.9 M
In-stock SKU
15,000+
Warehouse Area(㎡)
