Renesas 8745BKI-21LFT
Manufacturer No:
8745BKI-21LFT
Manufacturer:
Renesas
Package:
Description:
1:1 Differential-to-LVDS Zero Delay Clock Generator
Quantity:
In Stock :8198
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Shipped from：HK Warehouse
Expected Shipping：Sun, May 31 - Mon, Jun 1, 2026
Lead Time：Inquire about availability
Date Code：Within 2 Years
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DELIVERY TIME1. Once the goods are shipped, estimated delivery time depends on the shipping methods you chose: FedEx International, 5-7 business days.
2. For in-stock parts, orders normally could be shipped out within 1-2days.
8745BKI-21LFT Information
Renesas 8745BKI-21LFT technical specifications, attributes, parameters and parts with similar specifications to Renesas 8745BKI-21LFT.
- Type
- Parameter
- Lead Count (#)
- 32
- Carrier Type
- Reel
- Moisture Sensitivity Level (MSL)
- 3
- Qty. per Reel (#)
- 2500
- Qty. per Carrier (#)
- 0
- Package Area (mm²)
- 25.0
- Pitch (mm)
- 0.5
- Pkg. Dimensions (mm)
- 5.0 x 5.0 x 0.9
- Pb (Lead) Free
- Yes
- Pb Free Category
- e3 Sn
- Type
- Parameter
- Temp. Range
- -40 to +85°C
- Advanced Features
- Feedback Input
- C-C Jitter Max P-P (ps)
- 30
- Core Voltage (V)
- 3.3
- Feedback Input
- Yes
- Input Freq (MHz)
- 31.25 - 700
- Input Type
- HCSL, HSTL, LVDS, LVPECL, SSTL
- Inputs (#)
- 1
- Length (mm)
- 5
- MOQ
- 2500
Download datasheets and manufacturer documentation for Renesas 8745BKI-21LFT.
The 8745BI-21 is a highly versatile 1:1 LVDS Clock Generator. The 8745BI-21 has a fully integrated PLL and can be configured as a zero delay buffer, multiplier or divider, and has an output frequency range of 31.25MHz to 700MHz. The Reference Divider, Feedback Divider and Output Divider are each programmable, thereby allowing for the following output-to-input frequency ratios: 8:1, 4:1, 2:1, 1:1, 1:2, 1:4, 1:8. The external feedback allows the device to achieve "zero delay" between the input clock and the output clock. The PLL_SEL pin can be used to bypass the PLL for system test and debug purposes. In bypass mode, the reference clock is routed around the PLL and into the internal output dividers.
- One differential LVDS output designed to meet or exceed the requirements of ANSI TIA/EIA-644 One differential feedback output pair
- Differential CLK, nCLK input pair
- CLKx, nCLKx pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL
- Output frequency range: 31.25MHz to 700MHz
- Input frequency range: 31.25MHz to 700MHz
- VCO range: 250MHz to 700MHz
- External feedback for "zero delay" clock regeneration with configurable frequencies
- Programmable dividers allow for the following output-to-input frequency ratios: 8:1, 4:1, 2:1, 1:1, 1:2, 1:4, 1:8
- Cycle-to-cycle jitter: 30ps (maximum)
- Output skew: 40ps (maximum)
- Static phase offset: 25ps ± 125ps
- Full 3.3V supply voltage
- -40°C to 85°C ambient operating temperature
- Available in lead-free (RoHS 6) package
AIChipLink – Your Trusted Electronic Components Distributor
12.28 M
Listed Part Number
3,000+
Leading Manufacturers
4.9 M
In-stock SKU
15,000+
Warehouse Area(㎡)
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