

NXP 74LV174PW,118
Manufacturer No:
74LV174PW,118
Manufacturer:
Package:
16-TSSOP (0.173, 4.40mm Width)
Description:
1V~5.5V 100MHz D-Type Flip Flop DUAL 74LV174 160?A 74LV Series 16-TSSOP (0.173, 4.40mm Width)
Quantity:
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74LV174PW,118 information
NXP 74LV174PW,118 technical specifications, attributes, parameters and parts with similar specifications to NXP 74LV174PW,118.
- Type
- Parameter
- Mounting Type
- Surface Mount
- Package / Case
- 16-TSSOP (0.173, 4.40mm Width)
- Surface Mount
- YES
- Operating Temperature
- -40°C~125°C TA
- Packaging
- Tape & Reel (TR)
- Series
- 74LV
- Published
- 1998
- JESD-609 Code
- e4
- Pbfree Code
- yes
- Part Status
- Obsolete
- Moisture Sensitivity Level (MSL)
- 1 (Unlimited)
- Number of Terminations
- 16
- Type
- D-Type
- Terminal Finish
- NICKEL PALLADIUM GOLD
- Subcategory
- FF/Latches
- Packing Method
- TAPE AND REEL
- Technology
- CMOS
- Voltage - Supply
- 1V~5.5V
- Terminal Position
- DUAL
- Terminal Form
- GULL WING
- Peak Reflow Temperature (Cel)
- 260
- Supply Voltage
- 3.3V
- Time@Peak Reflow Temperature-Max (s)
- 30
- Base Part Number
- 74LV174
- Qualification Status
- Not Qualified
- Output Type
- Non-Inverted
- Number of Elements
- 1
- Supply Voltage-Max (Vsup)
- 5.5V
- Power Supplies
- 3.3V
- Supply Voltage-Min (Vsup)
- 1V
- Load Capacitance
- 50pF
- Clock Frequency
- 100MHz
- Family
- LV/LV-A/LVX/H
- Current - Quiescent (Iq)
- 160?A
- Current - Output High, Low
- 12mA 12mA
- Output Polarity
- TRUE
- Number of Bits per Element
- 6
- Max Propagation Delay @ V, Max CL
- 21ns @ 5V, 50pF
- Trigger Type
- Positive Edge
- Input Capacitance
- 3.5pF
- fmax-Min
- 20 MHz
- Max Frequency@Nom-Sup
- 20000000Hz
- Height Seated (Max)
- 2mm
- Width
- 5.3mm
- RoHS Status
- RoHS Compliant
Download datasheets and manufacturer documentation for NXP 74LV174PW,118.
Datasheets:
Environmental Information:
PCN Obsolescence/ EOL:
PCN Packaging:
74LV174PW,118 Overview
16-TSSOP (0.173, 4.40mm Width)is the packaging method. The Tape & Reel (TR)package contains it. T flip flop is configured with an output of Non-Inverted. This trigger is configured to use Positive Edge. In this case, the electronic component is mounted in the way of Surface Mount. The JK flip flop operates with an input voltage of 1V~5.5V volts. In the operating environment, the temperature is -40°C~125°C TA. It is an electronic flip flop with the type D-Type. This type of FPGA is a part of the 74LV series. This D flip flop should not have a frequency greater than 100MHz. A total of 1elements are present in it. There is 160?A quiescent consumption. A total of 16terminations have been recorded. The 74LV174 family contains it. A voltage of 3.3V provides power to the D latch. This T flip flop has a capacitance of 3.5pF farads at the input. It belongs to the family of electronic devices known as LV/LV-A/LVX/H. There is a FF/Latchesbase part number assigned to the RS flip flops. As soon as Vsup reaches 5.5V, the maximum supply voltage is reached. For normal operation, the supply voltage (Vsup) should be kept above 1V. Considering its reliability, this T flip flop is well suited for TAPE AND REEL. A total of 3.3V power supplies are needed to run it.
74LV174PW,118 Features
Tape & Reel (TR) package
74LV series
3.3V power supplies
74LV174PW,118 Applications
There are a lot of NXP USA Inc.
74LV174PW,118 Flip Flops applications.
- Shift Registers
- Storage Registers
- Bounce elimination switch
- Data storage
- Data transfer
- Latch
- Registers
- Memory
- Frequency division
- Memory
User Guide
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Step1:Prepare product

Step2:Desiccant Protection

Step3:Vacuum Packaging

Step4:Individual Package

Step5:Anti-collision Filling

Step6:Packaging Box
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